Flip chip interconnection with double post
AssigneeTessera, Inc.
InventorJinsu Kwon
Life of this patent
Estimating the term…
Abstract
A packaged microelectronic assembly includes a microelectronic element having a front surface and a plurality of first solid metal posts extending away from the front surface. Each of the first posts has a width in a direction of the front surface and a height extending from the front surface, wherein the height is at least half of the width. There is also a substrate having a top surface and a plurality of second solid metal posts extending from the top surface and joined to the first solid metal posts.
Claims32
A packaged microelectronic element, comprising:
- a microelectronic element having a front surface and a plurality of first solid metal posts extending away from the front surface, each first post having a width in a direction of the front surface and a height extending from the front surface, wherein the height is at least half of said width;
- and
- a substrate having a top surface and a plurality of second solid metal posts extending from the top surface and joined to the first solid metal posts with a fusible metal, said second posts having top surfaces and edge surfaces extending abruptly away from said top surfaces of said second posts,
- the substrate including terminals at a bottom surface opposite the top surface of said substrate, and conductive interconnects extending through the substrate and electrically connecting the terminals with the second solid metal posts,
- wherein said plurality of first solid metal posts are etched metal posts and said plurality of second solid metal posts are etched metal posts having a frustoconical shape.
A packaged microelectronic element, comprising:
- a microelectronic element having a front surface and a plurality of first solid metal posts extending away from the front surface, each post having a width in a direction of the front surface and a height extending from the front surface, wherein the height is at least half of said width;
- and
- a substrate having a top surface and a plurality of second solid metal posts extending from the top surface and joined to the first solid metal posts, the substrate including terminals at a bottom surface opposite the top surface, and conductive interconnects extending through the substrate and electrically connecting the terminals with the second solid metal posts,
- wherein the first and second posts are diffusion-bonded together, and
- wherein said plurality of first posts are etched posts and said plurality of second posts are etched posts having a frustoconical shape.
A packaged microelectronic element, comprising:
- a microelectronic element having a front surface and a plurality of first solid metal posts extending away from the front surface, each post having a width in a direction of the front surface and a height extending from the front surface, said posts consist essentially of metal other than solder, lead, or tin;
- and
- a substrate having a top surface and a plurality of second solid metal posts extending from the top surface and joined to the first solid metal posts with a fusible metal, the substrate including terminals at a bottom surface opposite the top surface, and conductive interconnects extending through the substrate and electrically connecting the terminals with the second solid metal posts,
- wherein a ratio of a diameter of said first solid metal posts to a pitch of said plurality of first solid metal posts is no more than 3:4, and
- wherein said plurality of said first solid metal posts and said plurality of said second solid metal posts are etched posts having a frustoconical shape.
A packaged microelectronic element comprising:
- a microelectronic element having a front surface and a plurality of first solid metal posts extending away from the front surface, each post having a width in a direction of the front surface and a height extending from the front surface;
- and
- a substrate having a top surface and a plurality of second solid metal posts extending from the top surface and joined to the first solid metal posts, the substrate including terminals at a bottom surface opposite the top surface, and conductive interconnects extending through the substrate and electrically connecting the terminals with the second solid metal posts,
- wherein a pitch of said first posts ranges between 50 and 200 microns and a distance between said bottom surface of said microelectronic element and said top surface of said substrate is greater than 80 microns, and
- wherein said plurality of first solid metal posts are etched metal posts and said plurality of said second solid metal posts are etched metal posts having a frustoconical shape.
A packaged microelectronic element comprising:
- a microelectronic element;
- a substrate having a top surface, terminals at a bottom surface opposite said top surface, and conductive interconnects extending through said substrate;
- and
- a plurality of pillars extending between said microelectronic element and said substrate, each of said plurality of pillars comprising a first metal post portion attached to said microelectronic element, a second metal post portion attached to said substrate, and a metal fusion portion, wherein said first and second metal portions are joined together by said metal fusion portion, said plurality of pillars having a length not less than 50 microns, and a height of said first metal post portions is at least half of a width of each first metal post portion, and a height of said second metal post portions is at least half of a width of each respective second metal post portion,
- wherein said conductive interconnects electrically connect the terminals with said second solid metal post portions, and
- wherein at least one of said plurality of first metal post portions or said plurality of second metal post portions are etched metal post portions and have a frustoconical shape.
Dependencies are inferred from the claim text.