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US 8,558,371 B2Granted
Method for wafer level package and semiconductor device fabricated using the same
AssigneeSamsung Electronics Co., Ltd.
InventorsJiSun Hong, Taeje Cho, Un-Byoung Kang, Hyuekjae Lee, Youngbok Kim, Hyung-sun Jang
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Abstract
Provided is a wafer level packaging method and a semiconductor device fabricated using the same. In the method, a substrate comprising a plurality of chips is provided. An adhesive layer is formed on the substrate corresponding to boundaries of the plurality of chips. A cover plate covering an upper portion of the substrate and having at least one opening exposing the adhesive layer or the substrate at the boundaries among the plurality of chips is attached to the adhesive layer.
Claims16
A wafer level package method comprising:
- forming an adhesive layer on a substrate, the substrate including a plurality of chips and the adhesive layer is formed on boundaries of the plurality of chips;
- and
- attaching a cover plate to the substrate via the adhesive layer, the cover plate including at least one opening exposing at least one of the adhesive layer and the substrate at the boundaries of the plurality of chips,
- wherein the at least one opening includes at least one line hole corresponding to at least one of the boundaries of the plurality of chips, and the at least one line hole is a plurality of line holes, the plurality of line holes discontinuously formed and corresponding to the boundaries of the plurality of chips.
1 more element
Dependencies are inferred from the claim text.