Integrated decoupling capacitor employing conductive through-substrate vias

A semiconductor structure comprising:

• a capacitor located in a via extending through a semiconductor substrate and a contact structure located on said semiconductor substrate, wherein said capacitor comprises:
• an inner electrode comprising a conductive through-substrate via (TSV) structure that contiguously extends at least from an upper surface of said semiconductor substrate to a lower surface of said semiconductor substrate;
• a node dielectric present on sidewalls of the via that is laterally contacting and laterally enclosing said inner electrode and contiguously extending from said upper surface to said lower surface, wherein the node dielectric extends from the via onto a first face and a second face of the semiconductor substrate;
• and
• an outer electrode laterally contacting and laterally enclosing a portion of said node dielectric, wherein ends of the outer electrode contact the node dielectric that is present on the first face and the second face of the semiconductor substrate, wherein a first end of the conductive TSV structure is at the first face of the semiconductor substrate and a second end of the conductive TSV structure is at the second face of the semiconductor substrate so that current can be passed from a semiconductor chip that is in electrical communication to the first end of the conductive TSV structure through the semiconductor substrate to a packing substrate that is in electrical communication with the second end of the TSV structure, wherein said contact structure is conductively connected to said outer electrode.