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AssigneeSony Corporation
InventorYuki Miyanami
Estimating the term…
Disclosed herein is a semiconductor device including an element isolation region configured to be formed on a semiconductor substrate, wherein the element isolation region is formed of a multistep trench in which trenches having different diameters are stacked and diameter of an opening part of the lower trench is smaller than diameter of a bottom of the upper trench.
A solid-state imaging device comprising:
A solid-state imaging device comprising:
A solid-state imaging device comprising:
A solid-state imaging device comprising:
Dependencies are inferred from the claim text.
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Constructional details of image sensors: pixel isolation structures
Manufacture or treatment of image sensors covered by group H10F39/12: of CMOS image sensors
Image sensors: back-illuminated image sensors
Of isolation regions comprising dielectric materials: using trench refilling with dielectric materials, e.g. shallow trench isolations
About 5 years of term left · ends 9 Nov 2031 (estimated)
The present disclosure relates to a semiconductor device, a solid-state imaging device, a method for manufacturing a semiconductor device, a method for manufacturing a solid-state imaging device, and electronic apparatus.
A solid-state imaging device of a CMOS (Complementary Metal Oxide Semiconductor) image sensor (CIS) mounted type is configured by forming a unit pixel made with a photodiode serving as a light receiving part and plural transistors on a semiconductor substrate and two-dimensionally arranging the unit pixels. The plural transistors include e.g. a charge transfer transistor (TRG), an amplification transistor (AMP), a reset transistor (RST), and a selection transistor (SEL). It is also possible to employ a configuration in which these transistors are shared by plural light receiving parts. The respective terminals of these plural transistors are connected by multilayer interconnects in order to apply desired voltage pulses to these transistors and read out a signal current.
In the case of a back-illuminated imaging device, light receiving parts, transistors, and interconnect layers are formed in multiple layers on a semiconductor substrate. Thereafter, the front surface side, in which the interconnect layers are formed, is bonded to a support substrate and the semiconductor substrate is polished from the back surface to a desired thickness. The back surface side is used as the light incident surface side. In this case, color filters and on-chip lenses are formed over the polished back surface to thereby form a configuration in which light is incident on the light receiving parts from this back surface side without passing through the interconnect layers. This increases the aperture ratio and realizes an imaging device having high sensitivity.
FIG. 1 is a schematic sectional view of the configuration of a semiconductor device according to an embodiment of the present disclosure;
FIGS. 2A to 2F are step diagrams showing a method for manufacturing a semiconductor device according to a first embodiment of the present disclosure;
FIG. 3 is a schematic configuration diagram of a solid-state imaging device according to an embodiment of the present disclosure;
Examples of the best mode for carrying out the present disclosure (hereinafter, referred to as embodiment) will be described below with reference to the drawings. The order of the description is as follows.
1. First Embodiment (embodiment of semiconductor device and method for manufacturing semiconductor device)
(1) Embodiment of Semiconductor Device (embodiment of MOS transistor)