Thin film transistor and method for manufacturing the same
AssigneeSharp Kabushiki Kaisha
InventorsYoshiki Nakatani, Masao Moriguchi, Yohsuke Kanzaki, Yudai Takanishi
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AssigneeSharp Kabushiki Kaisha
InventorsYoshiki Nakatani, Masao Moriguchi, Yohsuke Kanzaki, Yudai Takanishi
Estimating the term…
The present invention aims at reducing an OFF current in a thin film transistor while maintaining an ON-state current. A TFT (100) includes a glass substrate (101) formed thereon with a source electrode (110) and a drain electrode (112) having their respective upper surfaces formed with n-type silicon layers (120, 121) of microcrystalline silicon. Microcrystalline silicon regions (135, 136) are formed respectively on the n-type silicon layers (120, 121) while an amorphous silicon region (130) is formed on the glass substrate (101), and these are covered by a microcrystalline silicon layer (145). Therefore, ON-state current flows from the drain electrode (112), through the microcrystalline silicon region (135), the microcrystalline silicon layer (145) and the microcrystalline silicon region (136) in this order, and then to the source electrode (110). Also, OFF current is limited by the amorphous silicon region (130).
A top-gate thin film transistor formed on an insulated substrate, comprising:
A method for manufacturing a top-gate thin film transistor, comprising:
Dependencies are inferred from the claim text.