CMOS imager with companded column signals
AssigneeSRI International
InventorsPeter Alan Levine, Rui Zhu, John Robertson Tower, Thomas Lee Vogelsong
Life of this patent
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Abstract
A non-linear conversion capability within an on-chip, per-column analog-to-digital converter (ADC) is provided to expand a compressed analog signal such that the resulting digital output that has a predetermined (linear or non-linear) mapping with respect to input brightness level of an incoming light signal to a row of pixels. The predetermined mapping may also be provided by a non-linear amplifier coupled to a linear or non-linear ADC and a resulting compressed non-linear digital representation at the output of the ADC is substantially linearized by an on-chip or an off-chip look-up table (LUT).
Claims33
An imager comprising:
- a plurality of pixels, wherein each pixel is comprised of a row select transistor coupled to a column of pixels;
- at least one analog element configured to provide a non-linear signal corresponding to a signal provided by at least one of the plurality of pixels, the at least one analog element coupled to at least one column of pixels;
- and
- a digital element configured to produce a predetermined mapping of the non-linear signal provided by the analog element.
An imager comprising:
- a plurality of pixels, wherein each pixel is comprised of a row select transistor coupled to a column of pixels;
- a first analog element coupled to at least one column having an output configured to provide a non-linear signal corresponding to a signal provided by at least one of the plurality of pixels, the first analog element coupled to at least one column of pixels;
- and
- a second analog element configured to produce a predetermined mapping of the non-linear signal provided by the first analog element.
Dependencies are inferred from the claim text.