Single spacer process for multiplying pitch by a factor greater than two and related intermediate IC structures
AssigneeMicron Technology, Inc.
InventorsDavid H Wells, Mirzafer K Abatchev
Life of this patent
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Abstract
Single spacer processes for multiplying pitch by a factor greater than two are provided. In one embodiment, n, where n≧2, tiers of stacked mandrels are formed over a substrate, each of the n tiers comprising a plurality of mandrels substantially parallel to one another. Mandrels at tier n are over and parallel to mandrels at tier n−1, and the distance between adjoining mandrels at tier n is greater than the distance between adjoining mandrels at tier n−1. Spacers are simultaneously formed on sidewalls of the mandrels. Exposed portions of the mandrels are etched away and a pattern of lines defined by the spacers is transferred to the substrate.
Claims19
A method for semiconductor processing, comprising:
- forming self-aligned tiered elongated mandrel structures having n tiers over a substrate, where n≧2, wherein mandrels at tier n are disposed over mandrels at tier n−1, wherein a distance between immediately adjacent mandrels at tier n is greater than a distance between adjacent mandrels at tier n−1, wherein the mandrels at tier n have exposed top surfaces, wherein mandrels at each tier are formed of a different material than mandrels at immediately adjacent tiers, wherein forming self-aligned tiered elongated mandrel structures comprises:
- forming a pattern in a photoresist layer, the pattern comprising photoresist features having a photoresist feature width;
- etching the pattern into two or more layers of the different materials corresponding to the tiers of the mandrel structure, the etched layers comprising etched features underlying the photoresist features and having a width substantially equal to the photoresist feature width;
- and
- subsequently reducing dimensions of etched features of the layer at tier n to form the mandrels at tier n;
- providing a layer of spacer material on the tiered mandrel structures;
- and
- subjecting the spacer material to an etch to simultaneously define spacers on sidewalls of each of the tiers.
A method for semiconductor processing, comprising:
- providing a self-aligned tiered mandrel structure over a substrate, the tiered mandrel structure having a first elongated mandrel tier underlying a second elongated mandrel tier, the first elongated mandrel tier having a first width, the second mandrel having a second width smaller than the first width, wherein an uppermost tier of the mandrel structure has exposed top surfaces, wherein the first elongated mandrel tier and the second elongated mandrel tier are formed of different materials, wherein providing the self-aligned tiered mandrel structure comprises:
- providing a pattern in a masking layer;
- transferring the pattern into first and second layers of the different materials corresponding to the first and second elongated mandrel tiers of the mandrel structure;
- and
- subsequently reducing dimensions of patterned features of the second layer to form the second mandrel in the second layer;
- and
- simultaneously defining spacers on sidewalls of both the first and the second mandrels.
Dependencies are inferred from the claim text.