Method for fabricating a semiconductor device with formation of conductive lines
AssigneeHynix Semiconductor Inc.
InventorsMi-Hye Kim, Byung-Sub Nam
Life of this patent
Estimating the term…
Abstract
A substrate having a first region and second regions disposed on two sides of the first region; a first group of conductive lines extending from the first region to the second regions on the substrate; a second group of conductive lines alternating with the first group of times and extending from the first region to the second regions on the substrate; interlayer insulating layers formed over the substrate; insulating layers formed in first open regions of the interlayer insulating layers and the first group of conductive lines in the second region; and contact plugs contacting second group of conductive line formed in second open regions of the interlayer insulating layer in the second region.
Claims17
A method for fabricating a semiconductor device, comprising:
- forming a first group of conductive lines extending from a first region to a plurality of second regions over a substrate having the first region and the plurality of second regions;
- forming a second group of conductive lines that alternate with the first group of lines and extend from the first region to the plurality of second regions over the substrate;
- forming interlayer insulating layers over the substrate;
- forming open regions partially exposing the first and second groups of conductive lines by selectively etching the interlayer insulating layers in the plurality of second regions;
- forming an extended open region by removing a portion of each conductive line in the first group of conductive lines exposed by the open regions;
- forming insulating layers in the extended open regions;
- and
- forming contact plugs by gap-filling the open regions.
A method for fabricating a semiconductor device, comprising:
- forming a first group of conductive lines extending from a first region to a pair of second regions on a substrate having the first region and second regions disposed at both sides of the first region;
- forming a second group of conductive lines that alternate with the first group of lines and extend from the first region to the second regions over the substrate at both sides of the first region;
- forming interlayer insulating layers over the substrate;
- forming open regions partially exposing the first and second group of conductive lines by selectively etching the interlayer insulating layers of the second regions;
- forming a mask pattern exposing the open regions formed in the first group of conductive lines on the interlayer insulating layers;
- forming extended open regions by etching the first group of conductive lines in the open regions exposed by the mask pattern;
- forming insulating layers burying the extended open regions;
- removing the mask pattern;
- forming a conductive layer for a plug in the open regions over the substrate;
- and
- forming contact plugs in the open regions by performing a planarization process until the interlayer insulating layers are exposed.
Dependencies are inferred from the claim text.