FinFET LDD and source drain implant technique

A method of forming an integrated circuit, the method comprising:

• providing a semiconductor wafer;
• and
• forming a fin field-effect transistor (FinFET) comprising:
• forming a semiconductor fin on the semiconductor wafer;
• forming a gate stack on the semiconductor fin;
• performing a hot-implantation to form an implanted region adjacent the gate stack at a wafer temperature higher than about 300° C., wherein the step of performing the hot implantation is selected from the group consisting essentially of:
• implanting the semiconductor wafer to form a lightly-doped source/drain region;
• implanting the semiconductor wafer to form a pocket region;
• and implanting the semiconductor wafer to form a deep source/drain region;
• and
• after the hot-implantation, epitaxially growing a semiconductor layer on exposed portions of the semiconductor fin not covered by the gate stack.

A method of forming an integrated circuit, the method comprising:

• providing a semiconductor wafer;
• forming a first semiconductor fin and a second semiconductor fin on the semiconductor wafer, wherein the first semiconductor fin is in a first device region and the second semiconductor fin is in a second device region, and wherein one of the first device region and second device region is a PMOS region, and the other is an NMOS device region;
• forming a first gate stack on a top surface and sidewalls of the first semiconductor fin;
• forming a second gate stack on a top surface and sidewalls of the second semiconductor fin;
• forming a first hard mask and a first photo resist over the first hard mask to cover the second gate stack and the second semiconductor fin, wherein the first hard mask and the first photo resist do not cover the first gate stack and the first semiconductor fin;
• performing a first pocket implantation to form a first pocket region in the first semiconductor fin at a first wafer temperature lower than 150° C.;
• removing the first photo resist without removing the first hard mask;
• and
• performing a first hot-implantation using the first hard mask to form a first lightly doped source and drain (LDD) region in the first semiconductor fin at a second wafer temperature higher than about 300° C.;
• and
• removing the first hard mask from the second device region.