Method of fabricating semiconductor device having buried wiring and related device
AssigneesSamsung Electronics Co., Ltd., Snu R&Db Foundation
InventorsMin-Chul Sun, Byung-Gook Park
Life of this patent
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Abstract
According to example embodiments of inventive concepts, a method of fabricating a semiconductor device includes forming a sacrificial pattern having SiGe on a crystalline silicon substrate. A body having crystalline silicon is formed on the sacrificial pattern. At least one active element is formed on the body. An insulating layer is formed to cover the sacrificial pattern, the body, and the active element. A contact hole is formed to expose the sacrificial pattern through the insulating layer. A void space is formed by removing the sacrificial pattern. An amorphous silicon layer is formed in the contact hole and the void space. The amorphous silicon layer is transformed into a metal silicide layer.
Claims19
A method of fabricating a semiconductor device, comprising:
- forming a sacrificial pattern having SiGe on a substrate,
- the substrate having crystalline silicon;
- forming a body on the sacrificial pattern,
- the body having crystalline silicon;
- forming at least one active element on the body;
- forming an insulating layer that covers the sacrificial pattern, the body and the at least one active element;
- forming a contact hole to expose the sacrificial pattern through the insulating layer;
- forming a void space by removing the sacrificial pattern;
- forming an amorphous silicon layer in the contact hole and the void space;
- and
- transforming the amorphous silicon layer into a metal silicide layer.
A method of fabricating a semiconductor device, comprising:
- forming a sacrificial pattern on a substrate;
- forming an active element on the sacrificial pattern;
- forming an insulating layer that covers the sacrificial pattern and the active element;
- forming a contact hole to expose the sacrificial pattern through the insulating layer;
- forming a void space by removing the sacrificial pattern;
- forming an amorphous silicon layer in the contact hole and the void space;
- transforming the amorphous silicon layer into a metal silicide layer;
- and
- forming a conductive pattern on the metal silicide layer.
A method of fabricating a semiconductor device, comprising:
- forming a sacrificial pattern on a substrate;
- forming a stacked structure including at least one active element on the sacrificial pattern,
- the stacked structure defining at least one contact hole that exposes the sacrificial pattern;
- removing the sacrificial pattern to form a void pattern between the substrate and the stacked structure;
- forming an amorphous silicon layer in the at least one contact hole and the void pattern,
- the amorphous silicon layer partially filling at least one of the at least one contact hole and the void pattern;
- transforming the amorphous silicon layer into a metal silicide layer;
- forming a conductive pattern on the metal silicide layer;
- and
- forming a conductive plug in at least one of the at least one contact hole and the void pattern after the transforming the amorphous silicon layer into the metal silicide layer.
Dependencies are inferred from the claim text.