Oxygen plasma conversion process for preparing a surface for bonding

#The disclosure relates generally to a process for preparing a surface of a material for bonding to the surface of another material, more particularly, an oxygen plasma conversion process for treating a non-bondable surface of a substrate to make it bondable to the surface of another substrate, and more particularly, for making a non-bondable surface of a donor wafer bondable to the surface of a glass sheet to form a semiconductor on glass (SOG) substrate.

#To date, the semiconductor material most commonly used in semiconductor-on-insulator structures has been single crystalline silicon. Such structures have been referred to in the literature as silicon-on-insulator structures and the abbreviation “SOI” has been applied to such structures. Silicon-on-insulator technology is becoming increasingly important for high performance thin film transistors, solar cells, and displays. Silicon-on-insulator wafers consist of a thin layer of substantially single crystal silicon 0.01-1 microns in thickness on an insulating material. As used herein, SOI shall be construed more broadly to include a thin layer of material on insulating semiconductor materials other than silicon and including silicon.

#Various ways of obtaining SOI structures include epitaxial growth of silicon on lattice matched substrates. An alternative process includes the bonding of a single crystal silicon wafer to another silicon wafer on which an oxide layer of SiO2 has been grown, followed by polishing or etching of the top wafer down to, for example, a 0.05 to 0.3 micron layer of single crystal silicon. Further methods include ion-implantation methods in which hydrogen ions are implanted in a donor silicon wafer to create a weakened layer in the wafer for separation (exfoliation) of a thin silicon layer that is bonded to another silicon wafer with an insulating (or barrier) oxide layer in between. The latter method involving hydrogen ion implantation is currently considered advantageous over the former methods.

#FIG. 1 is a diagrammatic side view of an SiOG substrate fabricated using conventional ion implantation film transfer processes;

#FIG. 2 is a diagrammatic side view of a silicon donor wafer with a barrier layer deposited thereon in accordance with an embodiment of the present invention;

#FIG. 3 is a diagrammatic side view of the donor wafer of FIG. 2 being implanted with ions in accordance with an embodiment of the present invention;

#Although the features, aspects and embodiments disclosed herein may be discussed in relation to silicon-on glass (SiOG) and germanium-on-glass (GeOG) structures and the manufacture of SiOG and GeOG structures, skilled artisans will understand that this disclosure need not be and is not limited to SiOG and GeOG structures. Indeed, the broadest protectable features and aspects disclosed herein are applicable to any process in which ion implantation thin film transfer techniques are employed to transfer and bond a thin film of a semiconductor material onto a glass, glass-ceramic or semiconductor support or handle substrate to produce semiconductor-on-glass (SOG) structures or semiconductor-on-insulator (SOI, typically semiconductor-on-semiconductor) structures. For ease of presentation, however, the disclosure herein is primarily made in relation to the manufacture of SiOG and GeOG structures. The specific references made herein to SiOG and GeOG structures are to facilitate the explanation of the disclosed embodiments and are not intended to, and should not be interpreted as, limiting the scope of the claims in any way to SiOG or GeOG substrates unless explicitly stated otherwise. The processes described for the fabrication of SiOG and GeOG substrates are equally applicable the manufacture of other SOG and SOI substrates. Unless explicitly stated otherwise, the SiOG, SOG, GeOG and SOI abbreviations as used herein should be viewed as referring to semiconductor-on-glass (SOG) structures in general, including, but not limited to, silicon-on-glass (SiOG) structures, germanium-on-glass (GeOG) structures, as well as to semiconductor-on-insulator (SOI) structures.

#SOG structures may have suitable uses in connection with fabricating thin film transistors (TFTs), e.g., for display applications, including organic light-emitting diode (OLED) displays and liquid crystal displays (LCDs), integrated circuits, photovoltaic devices, thermoelectric devices, sensors, solar cells, etc. Although not required, the semiconductor material of the layer may be in the form of a substantially single-crystal material. The word “substantially” is used in describing the layer to take into account the fact that semiconductor materials normally contain at least some internal or surface defects either inherently or purposely added, such as lattice defects or a few grain boundaries. The word “substantially” also reflects the fact that certain dopants may distort or otherwise affect the crystal structure of the bulk semiconductor.

#With reference to the drawings, wherein like numerals indicate like elements, reference is now made to FIGS. 1-7, which illustrate a general ion implantation film transfer process (and resultant intermediate structures) for fabricating an SOG structure with the aforementioned barrier layer in accordance with an embodiment hereof. Turning first to FIG. 1, a semiconductor donor wafer 120 is prepared, such as by polishing, cleaning, etc. to produce a relatively flat and uniform implantation surface 121 suitable for bonding to the support or handle substrate 102 (see FIGS. 7 and 8), e.g., a glass or glass-ceramic substrate. By way of example only, the semiconductor donor wafer 120 may be a substantially single crystal Si wafer, although as discussed above any other suitable semiconductor material may be employed. Regular round 300 mm prime grade silicon wafers may be chosen for use as donor wafers or substrates 120 for the fabrication of SiOG structures or substrates. The donor wafers may have <001> crystalline orientation and 8-12 Ohm/cm resistivity, and be Cz grown, p-type, boron doped wafers. Crystal Originated Particle (COP) free wafers may be chosen, because the COPs might obstruct the film transfer process or disturb transistor operation. Doping type and level in the wafers may be chosen to obtain desirable threshold voltages in eventual transistors to be subsequently made on the SiOG substrates. The largest available wafer size 300 mm may be chosen, because this will allow economical SiOG mass production.