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US 8,557,667 B2Granted
Spacer for a gate electrode having tensile stress and a method of forming the same
AssigneeGlobalfoundries Inc.
InventorsHartmut Rülke, Katja Huy, Markus Lenski
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Abstract
By reducing a deposition rate and maintaining a low bias power in a plasma atmosphere, a spacer layer, for example a silicon nitride layer, may be deposited that exhibits tensile stress. The amount of tensile stress is controllable within a wide range, thereby providing the potential for forming sidewall spacer elements that modify the charge carrier mobility and thus the conductivity of the channel region of a field effect transistor.
Claims15
A method of forming spacer elements, the method comprising:
- forming a gate electrode above a semiconductor region;
- forming at least one trench isolation in the semiconductor region, thereby creating a compressive stress in a channel region beneath the gate electrode;
- depositing in a high frequency plasma atmosphere a spacer layer having tensile stress over said gate electrode and said semiconductor region, wherein depositing said spacer layer comprises controlling a bias voltage in said high frequency plasma atmosphere to adjust a degree of tensile stress in said spacer layer such that the tensile stress in said spacer layer compensates for the compressive stress in the channel region;
- and
- etching said spacer layer to form a spacer element having tensile stress.
2 more elements
Dependencies are inferred from the claim text.