US 8,557,664 B2 · Methods of fabricating semiconductor devices

Abstract

A method of fabricating a semiconductor device using a recess channel array is disclosed. A substrate is provided having a first region and a second region, including a first transistor in the first region including a first gate electrode partially filling a trench, and source and drain regions that are formed at both sides of the trench, and covered by a first insulating layer. A first conductive layer is formed on the substrate. A contact hole through which the drain region is exposed is formed by patterning the first conductive layer and the first insulating layer. A contact plug is formed that fills the contact hole. A bit line is formed that is electrically connected to the drain region through the contact plug, and simultaneously a second gate electrode is formed in the second region by patterning the first conductive layer.

Claims11

Dependent claims

A semiconductor device comprising:

a transistor disposed in a semiconductor substrate, the transistor comprising a gate electrode extending in a first direction, a gate insulating layer disposed on the gate electrode, and a source region and a drain region respectively disposed adjacent the gate electrode;
a contact plug contacting the drain region;
a first conductive layer extending in a second direction disposed on the substrate;
and
a second conductive layer disposed on the first conductive layer, the second conductive layer electrically connected to the drain region through the contact plug,
wherein the contact plug has a first side surface contacting the first conductive layer extending in the second direction and,
the contact plug has a second side surface that does not contact the first conductive layer extending in the second direction.

4 more elements

Dependencies are inferred from the claim text.

Methods of fabricating semiconductor devices

Life of this patent

Methods of fabricating semiconductor devices

Life of this patent

Abstract

Claims11