Punch-through diode

A punch-through diode comprising:

• a first semiconductor region of a first conductivity type and having a first peak impurity concentration;
• a second semiconductor region of a second conductivity type adjacent to the first semiconductor region and having a second peak impurity concentration that is less than the first peak impurity concentration;
• a third semiconductor region of the second conductivity type adjacent to the second semiconductor region and having a third peak impurity concentration that is greater than the second peak impurity concentration;
• a fourth semiconductor region of the second conductivity type adjacent to the third semiconductor region and having a fourth peak impurity concentration that is less than the third peak impurity concentration, the fourth peak impurity concentration is approximately the second peak impurity concentration;
• and
• a fifth semiconductor region of the first conductivity type adjacent to the fourth semiconductor region and having a fifth peak impurity concentration that is approximately the first peak impurity concentration.

A method of forming a punch-through diode comprising:

• forming a first semiconductor region of a first conductivity type and having a first peak impurity concentration;
• forming a second semiconductor region adjacent to the first semiconductor region and having a second peak impurity concentration that is less than the first peak impurity concentration, including depositing a semiconductor for the second semiconductor region without intentionally doping;
• forming a third semiconductor region of a second conductivity type adjacent to the second semiconductor region and having a third peak impurity concentration that is greater than the second peak impurity concentration, including doping a semiconductor for the third semiconductor region while depositing the semiconductor for the third semiconductor region;
• forming a fourth semiconductor region adjacent to the third semiconductor region and having a fourth peak impurity concentration that is less than the third peak impurity concentration, including depositing a semiconductor for the fourth semiconductor region without intentionally doping;
• and
• forming a fifth semiconductor region of the first conductivity type adjacent to the fourth semiconductor region and having a fifth peak impurity concentration that is greater than the peak third impurity concentration;
• and
• performing a thermal anneal after forming the first semiconductor region of the first conductivity type and having the first peak impurity concentration, after doping the semiconductor for the third semiconductor region, and after forming the fifth semiconductor region of the first conductivity type and having the fifth peak impurity concentration, the second semiconductor region has the first conductivity type and the second peak impurity concentration after the thermal anneal, the fourth semiconductor region has the first conductivity type and the fourth peak impurity concentration after the thermal anneal.

A method of forming a punch-through diode comprising:

• forming a first semiconductor region of a first conductivity type and having a first peak impurity concentration;
• forming a second semiconductor region adjacent to the first semiconductor region and having a second peak impurity concentration that is less than the first peak impurity concentration, including depositing a semiconductor for the second semiconductor region without intentionally doping;
• forming a third semiconductor region of a second conductivity type adjacent to the second semiconductor region and having a third peak impurity concentration that is greater than the second peak impurity concentration, including depositing a semiconductor for the third semiconductor region without intentionally doping;
• forming a fourth semiconductor region adjacent to the third semiconductor region and having a fourth peak impurity concentration that is less than the third peak impurity concentration, including depositing a semiconductor for the fourth semiconductor region without intentionally doping;
• and
• forming a fifth semiconductor region of the first conductivity type adjacent to the fourth semiconductor region and having a fifth peak impurity concentration that is greater than the peak third impurity concentration;
• implanting an impurity having the second conductivity type into the third semiconductor region at a level of at least the third peak impurity concentration after forming the fourth semiconductor region;
• and
• performing a thermal anneal after forming the first semiconductor region of the first conductivity type and having the first peak impurity concentration, after implanting the impurity having the second conductivity type, and after forming the fifth semiconductor region of the first conductivity type and having the fifth peak impurity concentration, the second semiconductor region has the first conductivity type and the second peak impurity concentration after the thermal anneal, the fourth semiconductor region has the first conductivity type and the fourth peak impurity concentration after the thermal anneal.