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US 8,556,159 B2Granted
Embedded electronic component
AssigneeFreescale Semiconductor, Inc.
InventorsTu-Anh N. Tran, Burton J. Carpenter
Life of this patent
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Abstract
Forming an embedded electronic component includes attaching an electronic component to a first conductive layer and forming a layer stack with a first partially cured dielectric layer having a first opening and a substrate having a second opening. The partially cured dielectric layer is located over the first conductive layer and the substrate is located over the first partially cured dielectric layer such that the first and second openings surround the electronic component. Heat and pressure are applied to the layer stack such that the first partially cured dielectric layer flows for filling gaps within the first and second openings and becomes fully cured.
Claims20
A method for forming an embedded electronic component, the method comprising:
- attaching an electronic component to a first conductive layer;
- providing a partially cured dielectric layer, wherein the partially cured dielectric layer includes a first opening;
- providing a patterned conductive layer, wherein the patterned conductive layer includes a second opening;
- forming a layer stack including the first conductive layer, the partially cured dielectric layer, and the patterned conductive layer wherein the partially cured dielectric layer is located over the first conductive layer such that the first opening surrounds the electronic component and the patterned conductive layer is located over the partially cured dielectric layer such that the second opening surrounds the electronic component;
- and
- applying pressure and heat to the layer stack such that the partially cured dielectric layer flows for filling gaps within the first and second openings and becomes fully cured, wherein the electronic component is located in the layer stack during the applying pressure and heat.
3 more elements
A method for forming an embedded electronic component, the method comprising:
- attaching a first major surface of an electronic component to a first conductive layer;
- providing a first partially cured dielectric layer, wherein the first partially cured dielectric layer includes a first opening;
- providing a fully cured dielectric layer with a first patterned metal layer on a first major surface of the fully cured dielectric layer and a second patterned metal layer on a second major surface of the fully cured dielectric layer, wherein the fully cured dielectric layer includes a second opening;
- providing a second partially cured dielectric layer, wherein the second partially cured dielectric layer includes a third opening;
- providing a second conductive layer;
- forming a layer stack with the first conductive layer, the first partially cured dielectric layer, the fully cured dielectric layer, the second partially cured dielectric layer, and the second conductive layer wherein the first partially cured dielectric layer is located over the first conductive layer such that the first opening surrounds the electronic component, the fully cured dielectric layer is located over the first partially cured dielectric layer such that the second opening surrounds the electronic component, the second partially cured dielectric layer is located over the fully cured dielectric layer such that the third opening surrounds the electronic component, and the second conductive layer is located over the second partially cured dielectric layer and the electronic component;
- applying pressure and heat to the layer stack such that the first and second partially cured dielectric layers flow for filling gaps within the first, second, and third openings and become fully cured, wherein during the applying pressure and heat, the fully cured dielectric layer remains solid.
4 more elements
A method for forming an embedded electronic component, the method comprising:
- attaching a first major surface of an electronic component to a first conductive layer;
- providing a first partially cured dielectric layer, wherein the first partially cured dielectric layer includes a first opening;
- providing a metal layer that includes a second opening;
- providing a second partially cured dielectric layer, wherein the second partially cured dielectric layer includes a third opening;
- providing a second conductive layer;
- forming a layer stack with the first conductive layer, the first partially cured dielectric layer, the metal layer, the second partially cured dielectric layer, and the second conductive layer wherein the first partially cured dielectric layer is located over the first conductive layer such that the first opening surrounds the electronic component, the metal layer is located over the first partially cured dielectric layer such that the second opening surrounds the electronic component, the second partially cured dielectric layer is located over the metal layer such that the third opening surrounds the electronic component, and the second conductive layer is located over the second partially cured dielectric layer and the electronic component;
- applying pressure and heat to the layer stack such that the first and second partially cured dielectric layers flow for filling gaps within the first, second, and third openings and become fully cured, wherein the electronic component is located in the layer stack during the applying pressure and heat.
4 more elements
Dependencies are inferred from the claim text.