Method of manufacturing coreless substrate
AssigneeIntel Corporation
InventorHoussam Jomaa
Life of this patent
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Abstract
Disclosed are a coreless substrate and a method of manufacturing the same. The coreless substrate includes a solder resist layer capable of being formed on each of on a first side and a second side of a metal panel. The solder resist layer includes at least one opening. A copper layer may be plated in the at least one opening such that a height of the copper layer exceeds a height of the solder resist layer. Further, at least one dielectric layer is deposited above the copper layer, and at least one microvia drilled in the dielectric layer. The at least one microvia enables an electrical connection between at least one of the first side and the second side of the metal panel and a lower surface of the coreless substrate.
Claims20
A method for manufacturing a coreless substrate, the method comprising:
- forming at least one solder resist layer on at least one of a first side and a second side of a metal panel;
- forming a first and at least a second opening in the at least one solder resist layer extending to the metal panel;
- forming a metal plating comprising copper directly on the surface of the metal panel in the first and at least second opening by electroplating;
- forming a surface finish layer on the metal plating in each of the first and at least second opening;
- electrolytic plating the surface finish layer in each of the openings with copper to form a discrete copper plating on the surface finish layer in each of the first and at least second opening, each discrete copper plating having a pin shape extending over a portion of the solder resist layer and a height which exceeds a height of the solder resist layer;
- forming at least one dielectric layer covering the discrete copper platings;
- and
- forming at least one microvia in the at least one dielectric layer, wherein at least a portion of the microvia extends to said discrete copper plating in each of said first and at least second opening;
- and separating said metal panel and said metal plating from said at least one solder resist layer and said surface finish layer.
A method for manufacturing a coreless substrate, the method comprising:
- forming at least one solder resist layer on at least one of a first side and a second side of a metal panel, said metal panel comprising copper;
- forming a first and at least one second opening in the at least one solder resist layer extending to the metal panel;
- forming a metal plating comprising copper directly on the surface of the metal panel in the first and at least second opening by electroplating;
- forming a surface finish layer comprising nickel on the metal plating in each of the first and at least second opening;
- forming first discrete copper platings by electrolytically plating the surface finish layer in each of the first and at least one second openings with copper, each of said first discrete copper platings having a pin shape extending over a portion of the solder resist layer and a height which exceeds a height of the solder resist layer;
- forming at least one first dielectric layer covering the discrete copper platings;
- forming at least one microvia in the at least one dielectric layer, at least a portion of said first microvia extends to said first discrete copper plating;
- and separating said metal panel and said metal plating from said at least one solder resist layer and said surface finish layer.
Dependencies are inferred from the claim text.