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AssigneeAdvanced Processor Architectures, LLC
InventorsLouis Edmund Chall, John Bradley Serson, Philip Arnold Roberts, Cecil Eugene Hutchins
Estimating the term…
On a typical motherboard the processor and memory are separated by a printed circuit data bus that traverses the motherboard. Throughput, or data transfer rate, on the data bus is much lower than the rate at which a modern processor can operate. The difference between the data bus throughput and the processor speed significantly limits the effective processing speed of the computer when the processor is required to process large amounts of data stored in the memory. The processor is forced to wait for data to be transferred to or from the memory, leaving the processor under-utilized. The delays are compounded in a distributed computing system including a number of computers operating in parallel. The present disclosure describes systems, method and apparatus that tend to alleviate delays so that memory access bottlenecks are not compounded within distributed computing systems.
A method of initializing a sleep mode for an integrated circuit chip comprising external interface circuits and primary components, the method comprising:
An apparatus configured to initialize a sleep mode for an integrated circuit chip comprising external interface circuits and primary components, the apparatus comprising:
Dependencies are inferred from the claim text.