Processor and method providing instruction support for instructions that utilize multiple register windows

A method, comprising:

• a hardware processor issuing instructions for execution, wherein the instructions are programmer-selectable from a defined instruction set architecture (ISA), and wherein the instructions include a large-operand instruction defined within the ISA, wherein execution of the large-operand instruction is dependent upon a plurality of registers arranged within a plurality of register windows, wherein each of the register windows comprises a plurality of input registers and a plurality of output registers, and wherein the register windows are arranged such that for at least a given one of the register windows, one or more output registers of the given register window form one or more input registers of a successive register window;
• and
• the hardware processor determining whether one or more of the register windows depended upon by the large-operand instruction are not present;
• in response to determining that one or more of the register windows are not present, the hardware processor restoring one or more of the register windows that were determined not to be present.

A system, comprising:

• a system memory, and
• a processor coupled to the system memory, wherein the processor comprises:
• an instruction fetch unit that, during operation, issues instructions for execution, wherein the instructions are programmer-selectable from a defined instruction set architecture (ISA);
• an instruction execution unit that, during operation, receives instructions for execution from the instruction fetch unit and executes a large-operand instruction defined within the ISA, wherein execution of the large-operand instruction is dependent upon a plurality of registers arranged within a plurality of register windows, wherein each of the register windows comprises a plurality of input registers and a plurality of output registers, and wherein the register windows are arranged such that for at least a given one of the register windows, one or more output registers of the given register window form one or more input registers of a successive register window;
• and
• control circuitry that, during operation, determines whether one or more of the register windows depended upon by the large-operand instruction are not present;
• wherein in response to determining that one or more of the register windows are not present, the control circuitry during operation causes to be restored one or more of the register windows that were determined not to be present.