System and method for performing predicated selection of an output register
AssigneeNVIDIA Corporation
InventorsTimo Aila, Samuli Laine
Life of this patent
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Abstract
A system includes a processor having an instruction register for storing an instruction having a predefined opcode, a predicate register for storing a predicate condition to select an output register for a result of the instruction, a first output register, and a second output register. The processor further includes processor circuitry operable to execute the instruction to produce a result, and processor circuitry operable to store the result of the instruction in the first output register if the predicate condition to select the output is true, and to store the second output register if the predicate condition to select the output is false. A single instruction is used to produce the result, and to store the result of the instruction.
Claims24
A processor having an instruction register for storing an instruction for a ray-box intersection test having a predefined opcode, a predicate register for storing a predicate condition to select an output register for a result of the instruction, a first output register, and a second output register, the processor further comprising:
- processor circuitry operable to execute the instruction to produce a result;
- and
- processor circuitry operable to store the result of the instruction in the first output register if the predicate condition to select the output register is true, and the second output register if the predicate condition to select the output register is false,
- wherein the processor is operable with a single instruction to produce the result, and to store the result of the instruction,
- and wherein the predicate condition is based on comparing a value for a component of a ray direction vector to zero.
In a processor having an instruction register storing an instruction for a ray-box intersection test having a predefined opcode, a predicate register for storing a predicate condition for the selecting an output register operable to store a result of the instruction, a first output register, and a second output register, a method comprising:
- executing the instruction to produce a result;
- and
- storing the result of the instruction to (i) the first output register if the predicate condition for selecting the output register is true, and (ii) the second output register if the predicate condition for selecting the output register is false,
- wherein said executing and storing are performed using a single instruction, and
- wherein the predicate condition is based on comparing a value for a component of a ray direction vector to zero.
A computer program product, resident on a non-transitory computer-readable medium, and operable to control a processor, the processor having an instruction register storing an instruction for a ray-box intersection test having a predefined opcode, a predicate register for storing a predicate condition to select an output register for a result of the instruction, a first output register, and a second output register, the computer program product comprising:
- instruction code to execute the instruction to produce a result;
- and
- instruction code to store the result of the instruction in either (i) the first output register if the predicate condition to select the output register is true, or (ii) the second output register if the predicate condition to select the output register is false,
- wherein the processor is operable with a single instruction to produce the result, and to store the result of the instruction,
- and wherein the predicate condition is based on comparing a value for a component of a ray direction vector to zero.
Dependencies are inferred from the claim text.