Methods and apparatus for matrix decompositions in programmable logic devices
AssigneeAltera Corporation
InventorMichael Fitton
Life of this patent
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Abstract
A processor is adapted for performing a QR-decomposition. The processor has a program memory, a program controller, connected to the program memory to receive program instructions, and at least one processing unit. The processing unit includes a CORDIC calculation block, and has a distributed memory structure, with separate memory blocks for storing respective parameter values.
Claims20
A processor for QR-decomposition, the processor comprising a boundary cell and at least one internal cell, wherein the boundary cell comprises:
- a first CORDIC unit, for receiving real and imaginary components of an input value of the boundary cell, and for supplying first magnitude and phase values as outputs of the first CORDIC unit;
- a second CORDIC unit, for receiving the first magnitude value as a first input, for supplying a second phase value as a first output, and for supplying a data value R of the boundary cell from a second output to a second input of the second CORDIC unit;
- and
- a sine(sin)/cosine(cos) calculation unit, for receiving the first and second phase values as inputs, and for calculating sin and cos values based on the supplied first and second phase values;
- and
- the at least one internal cell comprises:
- a complex multiplication block, for receiving real and imaginary components of an input value of the internal cell, for receiving said sin and cos values from said boundary cell, for supplying a data value R of the internal cell from an output to an input of the complex multiplication block, and for supplying real and imaginary components of an output value of the internal cell.
A method for performing QR-decomposition in a processor, the processor having a boundary cell and at least one internal cell, the method comprising:
- receiving, at a first CORDIC unit of the boundary cell, real and imaginary components of an input value of the boundary cell;
- supplying first magnitude and phase values as outputs of the first CORDIC unit based on the received real and imaginary components;
- receiving the supplied first magnitude value as a first input of a second CORDIC unit of the boundary cell;
- supplying a second phase value as a first output of the second CORDIC unit;
- supplying a data value R of the boundary cell from a second output to a second input of the second CORDIC unit;
- calculating, at a sine(sin)/cosine(cos) calculation unit of the boundary cell, sin and cos values based on the supplied first and second phase values;
- processing, using complex multiplication circuitry of the at least one internal cell, real and imaginary components of an input value of the at least one internal cell and said calculated sin and cos values from said boundary cell;
- and
- supplying, based on the processing using the complex multiplication circuitry, real and imaginary components of an output value of the at least one internal cell.
A method of configuring a programmable integrated circuit device as a QR-decomposition processor having a boundary cell and at least one internal cell, said method comprising:
- configuring logic of said programmable integrated circuit device as a first CORDIC unit in the boundary cell, for receiving real and imaginary components of an input value of the boundary cell of the boundary cell, and for supplying first magnitude and phase values as outputs of the first CORDIC unit;
- configuring logic of said programmable integrated circuit device as a second CORDIC unit in the boundary cell, for receiving the first magnitude value as a first input, and for supplying a second phase value as a first output, and supplying a data value R of the boundary cell from a second output to a second input of the second CORDIC unit;
- and
- configuring logic of said programmable integrated circuit device as a sine(sin)/cosine(cos) calculation unit in the boundary cell, for receiving the first and second phase values as inputs, and for calculating sin and cos values based on the supplied first and second phase values;
- and
- configuring logic of said programmable integrated circuit device as a complex multiplication block in the at least one internal cell, for receiving real and imaginary components of an input value of the internal cell, for receiving said sin and cos values from said boundary cell, for supplying a data value R of the internal cell from an output to an input of the complex multiplication block, and for supplying real and imaginary components of an output value of the internal cell.
Dependencies are inferred from the claim text.