Methods and systems for storing variable width stack elements in a single memory stack

A system for storing variable width stack elements in a single, two-dimensional, last-in, first-out memory stack having a number of multi-bit rows of uniform row width, wherein (i) height of the two-dimensional memory stack is the number of rows, each different row along the height of the memory stack having a different address value, and (ii) width of the two-dimensional memory stack is the uniform row width, comprising:

• a processor;
• and
• a memory operatively coupled to the processor, wherein the memory includes a data storage module for storing the variable width stack elements in the single memory stack, having instructions capable of:
• splitting a first variable width stack element into two or more sub-elements, (i) the first variable width stack element having a width greater than the uniform row width of the two-dimensional memory stack and (ii) each sub-element having a width less than or equal to the uniform row width of the single memory stack upon receiving a write request;
• creating a first memory pointer for providing an address of a first read pointer in the single memory stack, the first read pointer providing an address corresponding to a first sub-element of the first variable width stack element;
• writing the first sub-element in a first available row in the single memory stack;
• incrementing a write pointer of the single memory stack when the first sub-element is written to the first available row on the single memory stack;
• and
• repeating the steps of writing and incrementing for a next sub-element in the two or more sub-elements until each of the two or more sub-elements is stored in a different row along the height of the single memory stack.

A non-transitory computer-readable storage medium for storing variable width stack elements in a single, two-dimensional, last-in, first-out memory stack having a number of multi-bit rows of uniform row width, wherein (i) height of the two-dimensional memory stack is the number of rows, each different row along the height of the memory stack having a different address value, and (ii) width of the two-dimensional memory stack is the uniform row width, having instructions that, when executed by a computing device, causes the computing device to perform a method comprising:

• splitting a first variable width stack element into two or more sub-elements, (i) the first variable width stack element having a width greater than the uniform row width of the two-dimensional memory stack and (ii) each sub-element having a width less than or equal to the uniform row width of the single memory stack upon receiving a write request;
• creating a first memory pointer for providing an address of a first read pointer in the single memory stack, the first read pointer providing an address corresponding to a first sub-element of the first variable width stack element;
• writing the first sub-element in a first available row in the single memory stack;
• incrementing a write pointer of the single memory stack when the first sub-element is written to the first available row on the single memory stack;
• and
• repeating the steps of writing and incrementing for a next sub-element in the two or more sub-elements until each of the two or more sub-elements is stored in a different row along the height of the single memory stack.

An integrated circuit comprising:

• a two-dimensional memory stack having a number of multi-bit rows of uniform row width, wherein (i) height of the two-dimensional memory stack is the number of rows and (ii) width of the two-dimensional memory stack is the uniform row width;
• and
• a processor configured to store multiple, variable width stack elements into the memory stack in last-in, first-out order, wherein the processor is configured to store a first stack element having a width wider than the uniform row width of the memory stack by:
• (a) splitting the first stack element into two or more sub-elements, each having a width less than or equal to the uniform row width of the memory stack;
• and
• (b) storing each sub-element into a different location row along the height of the memory stack.