Integrating data from symmetric and asymmetric memory
AssigneeVirident Systems Inc.
InventorsVijay Karamcheti, Kenneth A. Okin, Kumar Ganapathy, Ashish Singhai, Rajesh Parekh
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AssigneeVirident Systems Inc.
InventorsVijay Karamcheti, Kenneth A. Okin, Kumar Ganapathy, Ashish Singhai, Rajesh Parekh
Estimating the term…
Data stored within symmetric and asymmetric memory components of main memory is integrated by identifying a first data as having access characteristics suitable for storing in an asymmetric memory component. The first data is included among a collection of data to be written to the asymmetric memory component. An amount of data is identified within the collection of data to be written to the asymmetric memory component. The amount of data is compared within the collection of data to a volume threshold to determine whether a block write to the asymmetric memory component is justified by the amount of data. If justified, the collection of data is loaded to the asymmetric memory component.
A method of integrating data stored within symmetric and asymmetric memory components of main memory and storing the resultant integrated data within at least one asymmetric memory component, where the symmetric memory components are each configured to enable random access write operations in which an address within a block of the symmetric memory component is written without affecting the availability of other addresses within the block of the symmetric memory component, and where the asymmetric memory components are each configured to enable block write operations in which a write to an address within a block of one of the asymmetric memory components affects the availability of other addresses within the block of the asymmetric memory component, the method comprising:
A method of integrating data stored within symmetric and asymmetric memory components of main memory and storing the resultant integrated data within at least one asymmetric memory component, where the symmetric memory components are each configured to enable random access write operations in which an address within a block of the symmetric memory component is written without affecting the availability of other addresses within the block of the symmetric memory component, and where the asymmetric memory components are each configured to enable block write operations in which a write to an address within a block of one of the asymmetric memory components affects the availability of other addresses within the block of the asymmetric memory component, the method comprising:
A system comprising:
Dependencies are inferred from the claim text.