Asymmetric memory migration in hybrid main memory

A system that manages a main memory that includes symmetric memory components associated with a first collection of memory operations and asymmetric memory components associated with a second collection of memory operations, where the symmetric memory components are each configured to enable random access write operations in which an address within a block of the symmetric memory component is written without affecting the availability of other addresses within the block of the symmetric memory component, and where the asymmetric memory components are each configured to enable block write operations in which an address within a block of one of the asymmetric memory components affects the availability of other addresses within the block of the asymmetric memory component, the system instructions that when executed on a processor perform operations that include:

• receiving, on a central processing unit (CPU), a command from an application to read data associated with a virtual address that is mapped to the main memory;
• determining, using the memory management unit, that the virtual address is mapped to one of the symmetric memory components of the main memory;
• accessing memory use characteristics indicating how the data associated with the virtual address has been accessed;
• determining, based on the memory use characteristics, that the data associated with the virtual address has access characteristics suited to an asymmetric memory component of the main memory;
• loading, using the CPU, the data associated with the virtual address to the asymmetric memory component of the main memory;
• receiving, after the loading and using the memory management unit, a command from the application to read the data associated with the virtual address;
• and
• retrieving, responsive to the received command, the data associated with the virtual address from the asymmetric memory component of the main memory.

A system that manages a main memory that includes symmetric memory components associated with a first collection of memory operations and asymmetric memory components associated with a second collection of memory operations, where the symmetric memory components are each configured to enable random access write operations in which an address within a block of the symmetric memory component is written without affecting the availability of other addresses within the block of the symmetric memory component, and where the asymmetric memory components are each configured to enable block write operations in which an address within a block of one of the asymmetric memory components affects the availability of other addresses within the block of the asymmetric memory component, the system instructions that when executed on a processor perform operations that include:

• means for receiving, on a central processing unit (CPU), a command from an application to read data associated with a virtual address that is mapped to the main memory;
• means for determining, using the memory management unit, that the virtual address is mapped to one of the symmetric memory components of the main memory;
• means for accessing memory use characteristics indicating how the data associated with the virtual address has been accessed;
• means for determining, based on the memory use characteristics, that the data associated with the virtual address has access characteristics suited to an asymmetric memory component of the main memory;
• means for loading, using the CPU, the data associated with the virtual address to the asymmetric memory component of the main memory;
• means for receiving, after the loading and using the memory management unit, a command from the application to read the data associated with the virtual address;
• and
• means for retrieving, responsive to the received command, the data associated with the virtual address from the asymmetric memory component of the main memory.