Flash memory module and storage system
AssigneeHitachi, Ltd.
InventorJun Kitahara
Life of this patent
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Abstract
A storage controller manages address conversion information denoting the correspondence relationship between a logical address and a physical address of storage area (for example, a physical block) inside a flash memory. The storage controller uses the above-mentioned address conversion information to specify a physical address corresponding to a logical address specified by an I/O request from a higher-level device, and sends an I/O command including I/O-destination information based on the specified physical address to a memory controller inside a flash memory module. The memory controller carries out the I/O with respect to a storage area inside a flash memory specified from the I/O-destination information of the I/O command from the storage controller.
Claims16
A storage system, which receives from a higher-level device an I/O request (input/output request) that specifies a logical address of a storage area inside a logical storage resource based on a flash memory, the storage system comprising:
- a flash memory module;
- and
- a storage controller that receives the I/O request from the higher-level device, and accesses the flash memory module in response to the I/O request,
- wherein the storage controller comprises:
- a storage resource that stores address conversion information denoting a correspondence relationship between a logical address and a physical address of a storage area inside the flash memory;
- and
- a processor that uses the address conversion information to specify a physical address corresponding to a logical address specified by the received I/O request, and sends an I/O command including I/O-destination information based on the specified physical address to a memory controller, and
- the flash memory module comprises:
- a flash memory;
- and
- a memory controller that receives the I/O command, and carries out an I/O to the storage area inside the flash memory specified from the I/O-destination information of the I/O command,
- wherein the flash memory comprises a plurality of physical blocks configured with a plurality of physical pages, and when a data element stored in a physical page inside a first physical block is updated to an update data element, the update data element is written to a physical page inside a second physical block that is a deleted physical block allocated to the first physical block,
- the address conversion information denotes a location of respective valid data elements corresponding to a logical block to which belongs a storage area corresponding to a logical address, and is updated by the processor when an update data element is written to a physical page inside the second physical block allocated to the first physical block corresponding to a first logical block,
- the processor creates a reclamation command, and sends the reclamation command to the memory controller of the flash memory module,
- the reclamation command including:
- a page list, which is a plurality of page information elements denoting a plurality of read-source physical pages in which are respectively stored a plurality of valid data elements that configure a valid data element group corresponding to the first logical block, and which is created using the address conversion information;
- deletion block information denoting a deletion block, which is a physical block from which a data element group is to be deleted;
- and
- write-destination block information denoting the deletion block, which constitutes a write destination of the valid data element group, the plurality of read-source physical pages exist in the first physical block and/or the second physical block, and
- the memory controller comprises a first buffer, and executes the following (3-1) to (3-3):
- (3-1) reading out a plurality of valid data elements from the plurality of read-source physical pages specified from the page list, and writing the plurality of valid data elements to the first buffer such that the valid data elements are arranged in the order of logical addresses corresponding to the first logical block;
- (3-2) deleting a data element group inside the deletion block specified from the deletion block information;
- and
- (3-3) writing a plurality of valid data elements stored in the first buffer to the deletion block specified from the write-destination block information.
Dependencies are inferred from the claim text.