US 8,554,967 B2 · Flow control mechanisms for avoidance of retries and/or deadlocks in an interconnect

Abstract

Flow control mechanisms avoid or eliminate retries of transactions in a coherency interconnect. A class of transaction (CoT) framework is defined whereby individual transactions are associated with CoT labels consistent with chains of dependencies that exist between transactions initiated by any of the cooperating devices that participate in a given operation. In general, coherency protocols create dependencies that, when mapped to physical resources, can result in cycles in a graph of dependencies and deadlock. To support architectural mechanisms for deadlock avoidance, CoT labels are applied to individual transactions consistent with a precedence order of those transactions both (i) with respect to the operations of which such transactions are constituent parts and (ii) as amongst the set of such operations supported in the coherency interconnect. CoT labels applied to respective transactions constitute a CoT framework that may be used by coherency managers to efficiently support concurrent in-flight transactions without retry.

Claims24

Dependent claims

A method of controlling transaction flow in an event-based coherency interconnect operatively coupled between devices to support operations amongst the devices relative to a coherency domain of addressable memory locations, the method comprising:

associating class of transaction (CoT) labels with constituent transactions of the supported operations, wherein the CoT labels associated with respective constituent transactions of a particular supported operation differ, but are in accordance with an acyclic precedence order of the constituent transactions;
receiving transaction requests from devices linked to the coherency interconnect, wherein, for at least address-type ones of the received transaction requests, the received transaction requests each specify a CoT label;
the coherency interconnect supplying CoT labeled grant indications in correspondence with, and responsive to, a subset of the received, CoT labeled transaction requests, wherein by supplying a particular CoT labeled grant indication to a particular requesting device, the coherency interconnect grants unconditional availability of a buffer for a transaction of the corresponding class from the particular requesting device.

An apparatus comprising:

a coherency manager for coupling between plural devices to support operations amongst the devices relative to a coherency domain of addressable memory locations, wherein at least some of the supported operations include plural constituent transactions, and wherein class of transaction (CoT) labels associated with respective constituent transactions of a particular supported operation differ, but are in accordance with an acyclic precedence order thereof of the constituent transactions;
a first set of interfaces of the coherency manager including signal paths for receiving transaction requests from respective ones of the devices, wherein, for at least address-type ones of the transaction requests, interfaces of the first set allow respective devices to specify respective CoT labels in correspondence with respective transaction requests;
and
a second set of interfaces of the coherency manager including signal paths for supplying CoT labeled grant indications in correspondence with, and responsive to, a subset of the received, CoT labeled transaction requests, wherein supply of a particular CoT labeled grant indication to a particular device signifies unconditional grant to the particular device of availability of resources for a transaction of the corresponding class.

1 more element

Dependencies are inferred from the claim text.

Flow control mechanisms for avoidance of retries and/or deadlocks in an interconnect

Life of this patent

Flow control mechanisms for avoidance of retries and/or deadlocks in an interconnect

Life of this patent

Abstract

Claims24