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US 8,554,851 B2Granted
Apparatus, system, and methods for facilitating one-way ordering of messages
AssigneeIntel Corporation
InventorsJames R. Vash, Vida Vakilotojar, Bongjin Jung, Yen-Cheng Liu
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Abstract
Methods, apparatus and systems for facilitating one-way ordering of otherwise independent message classes. A one-way message ordering mechanism facilitates one-way ordering of messages of different message classes sent between interconnects employing independent pathways for the message classes. In one aspect, messages of a second message class may not pass messages of a first message class. Moreover, when messages of the first and second classes are received in sequence, the ordering mechanism ensures that messages of the first class are forwarded to, and received at, a next hop prior to forwarding messages of the second class.
Claims16
A method comprising:
- enforcing a one-way message order mechanism for messages having independent message classes sent between first and second interconnects in an interconnect network, each of the first and second interconnects comprising a separate plurality of wiring pathways and coupled to separate pluralities of nodes and employing separate electronic pathways for messages belonging to the first and second message classes, wherein a message in a first message class is ensured to arrive at a destination node prior to a related message of a second message class sent to the destination node by
- employing a buffered mechanism between the first and second interconnects, wherein the buffered mechanism includes separate buffered paths corresponding to the first and second message classes and is configured to hold a message of a second message class received at the buffered mechanism in a later cycle than messages of a first class are received at the buffered mechanism and delay the message of the second message class from being sent out of the buffered mechanism until after the messages of the first class are sent out and received at their next destination.
An apparatus, comprising:
- a first buffered path, configured to receive messages corresponding to a first message class from a first interconnect and to send received messages corresponding to the first message class to a second interconnect, each of the first and second interconnects comprising a separate plurality of wiring pathways and coupled to separate pluralities of nodes;
- a second buffered path, configured to receive messages corresponding to a second message class from the first interconnect and to send received messages corresponding to the second message class to the second interconnect;
- and
- an interlock mechanism operatively coupled to the first and second buffered paths that manages ordered sending of messages of the first and second message classes received from the first interconnect and sent to the second interconnect, wherein the interlock mechanism is configured to ensure a message of a second message class received at the second buffered path in a later cycle than a message from a first class is received at the first buffered path is not sent out to the second interconnect until after the message of the first class is sent out and received at its next destination.
1 more element
A system, comprising:
- first and second ring interconnects, each having a separate plurality of nodes and comprising at least two separate pathways for transferring messages between nodes, including first and second rings used to transfer first and second message classes;
- a plurality of processor cores, operatively coupled to respective nodes in the first and second ring interconnects, each processor core having at least one level of cache;
- a plurality of cache agents operatively coupled to respective nodes in the first and second ring interconnects, each cache agent configured to send and receive messages of the first and second message classes;
- and
- a first buffered one-way message ordering mechanism operatively coupled between the first and second ring interconnects, configured to ensure that for messages of the first and second message classes sent from an agent in the first ring interconnect destined for one or more agents in the second ring interconnect, messages of the first class are forwarded to the second ring interconnect prior to messages of the second class such that a message of a second class received at an ingress of the ordering mechanism in a later cycle than a message of the first class may not be sent to the second ring interconnect until after the message of the first class is sent to the second ring interconnect and received at its next destination.
2 more elements
Dependencies are inferred from the claim text.