Black box model for large signal transient integrated circuit simulation
AssigneeTexas Instruments Incorporated
InventorsYuri Mirgorodski, Peter J. Hopper, William French, Philipp Lindorfer
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AssigneeTexas Instruments Incorporated
InventorsYuri Mirgorodski, Peter J. Hopper, William French, Philipp Lindorfer
Estimating the term…
A method of simulating an integrated circuit device under test (DUT) is provided, wherein the DUT includes a plurality of terminals. For each terminal of the DUT, a probe pulse is applied to the terminal and a reaction is recorded at the terminal and each of the other terminals to obtain values representative of reactive tails for the terminal. For each terminal, the values representative of the reactive tails obtained for the terminal are stored as an entry of a look-up table. Each entry includes n+x fields, wherein n represents a number of arguments in the entry and x represents a number of functions in the entry. For each terminal, a signal value at a selected time step is calculated.
A method of simulating an integrated circuit device under test (“DUT”), wherein the DUT includes at least first and second terminals, the method comprising:
Dependencies are inferred from the claim text.