Semiconductor device having point-shift type FIFO circuit

A semiconductor device comprising:

• a signal input line;
• a signal output line;
• 2n latch circuits each having an input node and an output node, where n is an integer greater than 1;
• an input selection circuit connected between the signal input line and the input nodes of the latch circuits;
• and
• an output selection circuit connected between the output nodes of the latch circuits and the signal output line, wherein
• the input selection circuit includes 2n input gates each connected between the signal input line and an associated one of the input nodes of the latch circuits,
• the output selection circuit includes n output gate stages connected in series between the output nodes of the latch circuits and the signal output line,
• the output gate stages includes ith output gate stage having 2n+1−i output gates, where i is an integer ranging from 1 to n,
• each of the output nodes of the latch circuits is connected to an associated one of input nodes of the output gates included in a top one of the output gate stages,
• the 2n+1−i output gates included in the ith output gate stage are classified into 2n−i output gate pairs,
• the output nodes of each of the output gate pairs included in a jth output gate stage are commonly connected to an associated one of input nodes of the output gates included in a j+1th output gate stage, where j is an integer ranging from 1 to n−1,
• the signal output line is connected to an output node of the output gate pair included in the nth output gate stage, and
• one of the output gates constituting each of the output gate pairs becomes electrically conductive while other of the output gates constituting each of the output gate pairs becomes electrically not conductive.