Semiconductor memory device for data sensing

A semiconductor memory device comprising:

• a first memory cell including a first switching element and a first capacitor for storing data, the first switching element being controlled by a first wordline, the first switching element having a first terminal connected to a first terminal of the first capacitor and a second terminal connected to a first bitline, the first capacitor having a second terminal for receiving a first plate voltage;
• a first reference memory cell including a first reference switching element and a first reference capacitor, the first reference switching element being controlled by a first reference wordline, the first reference switching element having a first terminal connected to a first terminal of the first reference capacitor and a second terminal connected to the first bitline, the first reference capacitor having a second terminal for receiving a first reference plate voltage different from the first plate voltage;
• a second memory cell including a second switching element and a second capacitor for storing data, the second switching element being controlled by a second wordline, the second switching element having a first terminal connected to a first terminal of the second capacitor and a second terminal connected to a second bitline, the second capacitor having a second terminal for receiving the first plate voltage;
• and
• a second reference memory cell including a second reference switching element and a second reference capacitor, the second reference switching element being controlled by a second reference wordline, the second reference switching element having a first terminal connected to a first terminal of the second reference capacitor and a second terminal connected to the second bitline, the second reference capacitor having a second terminal for receiving a second reference plate voltage different from the first plate voltage.