Data interface circuit, nonvolatile memory device including the same and operating method thereof

A nonvolatile memory device comprising:

• a memory cell array configured to store data;
• a page buffer unit including a plurality of page buffers coupled to the memory cell array;
• an address counter configured to generate a count column address by sequentially increasing a start column address;
• a data interface unit configured to separate consecutive input data into rising data and falling data, and to selectively transfer the rising data and falling data to an even column line and an odd column line in response to the start column address, wherein the data interface unit transfers the rising data to the odd column line and transfers the falling data to the even column line when the start column address is odd;
• and
• a column decoder configured to provide the rising data and falling data, which are transferred through the even column line and the odd column line, to the page buffer corresponding to the count column address.

A method for operating a nonvolatile memory device, the method comprising:

• generating a count column address by sequentially increasing a start column address;
• separating consecutive input data into rising data and falling data;
• selectively transferring the rising data and falling data to an even column line and an odd column line in response to the start column address, wherein the rising data is transferred to the odd column line and the falling data is transferred to the even column line when the start column address is odd;
• and
• storing the rising data and falling data, which are transferred through the even column line and the odd column line, into a memory cell in response to the count column address.