Phase change memory device
AssigneeMicron Technology, Inc.
InventorsFabio Pellizzer, Roberto Bez, Ferdinando Bedeschi, Roberto Gastaldi
Life of this patent
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Abstract
A phase change memory device with memory cells (2) formed by a phase change memory element (3) and a selection switch (4). A reference cell (2a) formed by an own phase change memory element (3) and an own selection switch (4) is associated to a group (7) of memory cells to be read. An electrical quantity of the group of memory cells is compared with an analogous electrical quantity of the reference cell, thereby compensating any drift in the properties of the memory cells.
Claims19
A phase change memory device, comprising:
- a memory array formed by a plurality of groups of memory cells, the memory cells being arranged in rows and columns and connected at cross-points of word lines and data bitlines, each of the memory cells having a phase change memory element and a selection switch;
- a plurality of reference cells, each reference cell including a reference phase change memory element and a reference selection switch, each of the plurality of reference cells being coupled to at least one of the plurality of groups of memory cells;
- and
- a reading stage coupled to the memory array, the reading stage having a current/voltage converter connectable to the data bitlines and reference bitlines through respective data bitline switches and reference bitline switches, the reference bitline switches being configured to be activated in sequence to feed current from one of the plurality of reference cells to a respective one of the data bitlines, during a read operation.
A system comprising:
- a processor;
- an input/output device coupled to said processor;
- a memory coupled to said processor, said memory including phase change memory device comprising:
- a memory array formed by a plurality of groups of memory cells, the memory cells being arranged in rows and columns and connected at cross-points of word lines and data bitlines, each of the memory cells comprising a phase change memory element and a selection switch;
- and
- a plurality of reference cells, each reference cell including a reference phase change memory element and a reference selection switch, each of the plurality of reference cells being coupled to at least one of the plurality of groups of memory cells;
- and
- a reading stage coupled to the memory array, the reading stage having a current/voltage converter connectable to the data bitlines and reference bitlines through respective data bitline switches and reference bitline switches, the reference bitline switches being configured to be activated in sequence to transfer data from one of the plurality of reference cells to a respective one of the data bitlines, during a read operation.
A method of reading a phase change memory device comprising a memory array formed by a plurality of groups of memory cells, the memory cells being arranged in rows and columns and connected at cross-points of wordlines and data bitlines, each of the memory cells comprising a phase change memory element and a selection switch, the memory device further including a plurality of reference cells, each of the plurality of reference cells including a reference phase change memory element and a reference selection switch, the plurality of reference cells being associated to at least one of the plurality of groups of memory cells and being connectable to a reference bitline, the method comprising:
- sequentially coupling each of the plurality of reference cells to a current/voltage converter to feed current from one of the plurality of reference cells to a respective one of the data bitlines;
- and
- comparing an electrical behavior of said memory cells and of said coupled ones of the plurality of reference cells.
Dependencies are inferred from the claim text.