Plasma display apparatus with power recovery circuit

#The present invention generally relates to plasma display apparatuses, and more specifically, to a plasma display apparatus including an address driver that drives address electrodes.

#Conventionally, a plasma display apparatus is known as a display apparatus that drives address electrodes with capacitive loads based on display data of lines and displays images on a display panel. The plasma display apparatus includes plural power wires to supply plural voltage levels, a control circuit to make the display data from input video signals and an address driving circuit to apply the plural voltage levels to plural address electrodes. In the plasma display apparatus, the address driving circuit selectively applies the plural voltage levels to the plural address electrodes, provides a charge distribution period between an address driving period of a line of the address electrodes and the next address driving period, disconnects the plural address electrodes from the power wires during the charge distribution period, makes a closed-loop state by connecting the address electrodes, redistributes the charges stored in the address electrodes to the address electrodes and tries to reduce the power consumption in the address period (For example, see Patent Document 1).

#In this way, in the address period, by performing a so-called charge sharing that distributes charges of the address electrodes when voltage is applied to the address electrodes, since it is possible to apply the voltage to the address electrodes from a state where the charge is distributed, the applied voltage and the power consumption can be reduced. [Patent Document 1] Japanese Patent Application Publication No. 2008-122930

#FIG. 1 is an overall configuration view of a plasma display apparatus of a first embodiment.

#FIG. 2 is a drawing showing an example of an exploded perspective view of the plasma display panel 10.

#FIG. 3 is a drawing showing a drive voltage waveform applied to each electrode of one subfield, in which FIG. 3-(a) is a drawing showing a drive waveform of a sustain electrode Xi, FIG. 3-(b) is a drawing showing a drive waveform of a scan electrode Yi, and FIG. 3-(c) is a drawing showing a drive waveform of an address electrode Aj.

#10 plasma display panel 11 front substrate 12 front glass substrate 13, 17 dielectric layer 14 protective film 15 back substrate 16 back glass substrate 18 rib 19, 19R, 19G, 19B phosphor 20 address drive circuit 21, 21a address driver 22, 22a address pulse output circuit 23, 24 level shift circuit 25, 25a power recovery circuit 30 sustaining drive circuit 40 scanning drive circuit 41 scanning circuit 42 sustaining circuit 43 reset circuit 50 drive control circuit 51 subfield conversion circuit 52 address data generation circuit 53 scan data generation circuit 54 on-time control circuit SW1, SW11, SW12, SW2, SW3 switch Aj address electrode

#In the following, the best mode for carrying out the present invention will be described by referring to the accompanying drawings.

#FIG. 1 is an overall view of a plasma display apparatus of a first embodiment of the present invention. In FIG. 1, the plasma display apparatus of the present embodiment includes a plasma display panel 10, an address drive circuit 20, a sustaining drive circuit 30, a scanning drive circuit 40 and a drive control circuit 50.