Back to results
US 8,552,958 B2Granted
Method of driving a gate line, gate drive circuit for performing the method and display apparatus having the gate drive circuit
AssigneeSamsung Display Co., Ltd.
InventorsMoon-Chul Park, Sang-Jae Yeo
Life of this patent
Estimating the term…
Abstract
There is provided a method of driving a gate line, a gate drive circuit for performing the method, and a display apparatus having the gate drive circuit. In the method, a plurality of gate signals, generated from a plurality of shift registers connected to a plurality of gate lines, is applied to the gate lines. An output of the gate signals is blocked during a vertical blanking interval, and then a gate off voltage is applied to the gate lines. Therefore, an output signal of the gate drive circuit may maintain a gate off voltage during a vertical blanking interval in which a clock signal is not applied to a gate drive circuit.
Claims11
A gate drive circuit, comprising:
- a plurality of shift registers, in which plural stages are connected one after another to each other, configured to output a plurality of gate signals;
- and
- an output control part configured to block outputs of the shift registers during a vertical blanking interval, the output control part configured to apply a gate off voltage to all of the gate lines,
- wherein the plurality of shift registers are configured to generate the plurality of gate signals using at least one clock signal, and during the vertical blanking interval, the at least one clock signal is not supplied to the plurality of shift registers,
- wherein data signals are not applied to data lines during the vertical blanking interval,
- wherein the output control part comprises:
- a first switching element connected to an output terminal of each of the shift registers, respectively;
- a second switching element connected to an output terminal of the first switching element and the gate lines, respectively;
- and
- a switching control part configured to turn off the first switching elements and turn on the second switching elements during the vertical blanking interval, the second switching element being configured to apply the gate off voltage to the gate line, and
- wherein the switching control part comprises an SR latch part comprising a set terminal configured to receive a second vertical start signal applied to a last shift register of the shift registers and a reset terminal configured to receive a first vertical start signal applied to a first shift register of the shift registers to be applied after the second vertical start signal, and the SR latch part is configured to output an output signal turning off the first switching element and turn on the second switching element in response to a high level of the second vertical start signal.
8 more elements
A gate drive circuit, comprising:
- a plurality of shift registers, in which plural stages are connected one after another to each other, configured to output a plurality of gate signals;
- and
- an output control part configured to block outputs of the shift registers during a vertical blanking interval, the output control part configured to apply gate off voltages to all of the gate lines,
- wherein the plurality of shift registers are configured to generate the plurality of gate signals using at least one clock signal, and during the vertical blanking interval, the at least one clock signal is not supplied to the plurality of shift registers,
- wherein data signals are not applied to data lines during the vertical blanking interval,
- wherein the output control part comprises:
- a first switching element connected to an output terminal of each of the shift registers, respectively;
- a second switching element connected to an output terminal of the first switching element and the gate lines, respectively;
- and
- a switching control part configured to turn off the first switching elements and turn on the second switching elements during the vertical blanking interval, the second switching element being configured to apply the gate off voltage to the gate line, and
- wherein the switching control part comprises an SR latch part comprising a set terminal configured to receive an output signal outputted from a last shift register of the shift registers and a reset terminal configured to receive an output signal outputted from a first shift register of the shift registers which is outputted after the output signal of the last shift register, and
- the SR latch part is configured to turn off the first switching element and turn on the second switching element in response to a high level of the output signal of the last shift register.
9 more elements
A display apparatus, comprising:
- a display panel comprising a plurality of gate lines, a plurality of data lines, and a plurality of pixel parts that are connected to the gate lines and the data lines;
- a source drive circuit configured to provide the data lines with a data voltage;
- a gate drive circuit comprising a plurality of shift registers, in which plural stages are connected one after another to each other, configured to output a plurality of gate signals, and an output control part configured to block outputs of the shift registers during a vertical blanking interval, the output control part being configured to apply a gate off voltage to all of the gate lines;
- and
- a printed circuit board (PCB) electrically connected to the display panel,
- wherein the plurality of shift registers are configured to generate the plurality of gate signals using at least one clock signal, and during the vertical blanking interval, the at least one clock signal is not supplied to the plurality of shift registers,
- wherein data signals are not applied to the data lines during the vertical blanking interval,
- wherein the output control part comprises:
- a first switching element connected to an output terminal of each of the shift registers, respectively;
- a second switching element connected to an output terminal of the first switching element and the gate lines, respectively;
- and
- a switching control part configured to turn off the first switching elements and turn on the second switching elements during the vertical blanking interval, the second switching element being configured to apply the gate off voltage to the gate line,
- wherein the display panel comprises a display area having the pixel part formed therein and a peripheral area surrounding the display area, and the gate drive circuit is formed in the peripheral area, and
- wherein the shift registers and the first and second switching elements are formed in the peripheral area, and the switching control part is disposed on the PCB.
11 more elements
Dependencies are inferred from the claim text.