Pixel circuit and display device
AssigneeSony Corporation
InventorsTetsuo Minami, Yukihito Iida, Katsuhide Uchino
Life of this patent
Estimating the term…
Abstract
A pixel circuit includes: a switching transistor whose conduction is controlled by a drive signal supplied to the control terminal; a drive wiring adapted to propagate the drive signal; and a data wiring adapted to propagate a data signal. The drive wiring is formed on a first wiring layer and connected to the control terminal of the switching transistor. The data wiring is formed on a second wiring layer and connected to a first terminal of the switching transistor. A multi-layered wiring structure is used so that the second wiring layer is formed on a layer different from that on which the first wiring layer is formed.
Claims19
A display device comprising:
- a plurality of pixel circuits arranged in a matrix form;
- a first controller configured to output a first voltage data onto a first wiring;
- and
- a second controller configured to output a second voltage data onto a second wiring;
- wherein the first wiring is configured to propagate the first voltage data,
- the second wiring is configured to propagate the second voltage data, and
- at least one of the plurality of pixel circuits comprises:
- a switching transistor having a control terminal and a current terminal, conduction of the switching transistor being controlled by the first voltage data supplied to the control terminal,
- an electro-optical element whose brightness is controlled by current flow, and
- a capacitive element being configured to receive the second voltage data propagated through the second wiring;
- and
- wherein the first wiring is formed on a first wiring layer and is electrically connected to the control terminal of the switching transistor and the first controller,
- the second wiring is formed on a second wiring layer and is electrically connected to the current terminal of the switching transistor and the second controller, and
- wherein the display device is configured to implement a multi-layered wiring structure, the multi-layered wiring structure at least including an intermediate wiring formed on a layer different from that on which the second wiring is formed, the intermediate wiring electrically connecting the second wiring to the current terminal of the switching transistor.
Dependencies are inferred from the claim text.