Methods and apparatus for suppression of low-frequency noise and drift in wireless sensors or receivers

#The present invention relates to systems and methods for suppressing low frequency noise and drift in wireless sensors.

#Passive imaging sensors operating in millimeter-wave atmospheric windows can capture images through obstacles such as fog, clouds, smoke and clothing. This unique feature enables several important applications including theft prevention, low-visibility airplane-landing, concealed weapon detection, covert terrestrial and aerial surveillance, highway traffic monitoring and precision targeting. Existing electronics technologies for passive imaging are bulky, expensive and require complicated moving mechanical components to meet performance requirements. There is a clear need for novel solutions that can significantly reduce the size, weight, power dissipation and cost (SWAP-C of passive imaging sensors while improving the performance and image quality. Such light-weight, low-power solutions will lead to a paradigm shift in the state-of-the-art and will enable new non-intrusive products such as hand-held imagers for port security, helmet-mounted imagers for the warfighter and compact imagers mounted on unmanned aerial vehicles (UAVs).

#State-of-the-art imagers are currently built using an array of receivers, each an assembly of several discrete compound-semiconductor (III-V) integrated circuits (ICs). In order to generate thousands of image pixels, either thousands of these receivers must be used (prohibitively heavy/expensive) or a smaller array must be scanned sequentially (requiring mechanical scanners). These receivers also require periodic mechanical/electronic switching to remove flicker noise/drift, resulting in additional components and a factor-of-two degradation in imager sensitivity. In order to address these challenges, highly-integrated imaging solutions in silicon technologies are needed. However, the performance of current passive imaging receivers in SiGe/CMOS is far from the acceptable level , due to a combination of (a) inferior transistor noise figure, (b) high insertion loss of Dicke switch, and (c) use of conventional architectures. It is clear that innovative architectures and techniques must be developed to address these issues and hence enable silicon-based receivers to meet the challenging requirements of practical imaging.

#FIG. 1 is a block diagram illustrating an exemplary embodiment of an imaging receiver, in accordance with one aspect of the invention;

#FIG. 2 is a block diagram illustrating an exemplary embodiment of the circuitry following the LNA module, in accordance with another aspect of the invention;

#FIG. 3 shows a block diagram illustrating another exemplary embodiment of the circuitry following the LNA module, in accordance with yet another aspect of the invention;

#FIG. 1 is a block diagram illustrating an exemplary embodiment of an imaging receiver. This embodiment is a highly-integrated receiver for passive or active imaging. As depicted in FIG. 1, the receiver has a low noise amplifier (LNA) module 11 to receive and amplify an input signal, a power detector module 12 to generate an output voltage proportional to the power at its input, and a circuit block/module or a technique/mechanism 18 to cancel or reduce the effect of flicker noise and drift in the receiver. Clock 15, calibration circuit 116 and digital support block 17 are also included in the receiver. The imaging receiver also includes a post-detection amplification and filtering block 13, and analog to digital converter (ADC) 14, and a digital signal processor (DSP) 19.

#FIG. 2 is a block diagram illustrating an exemplary embodiment of the circuitry following the LNA module, in accordance with the preferred embodiment. The power detector module 12 can include a power detector circuit 21, which may be realized by using non-linear devices/circuits, including but not limited to, diodes, MOS transistors, bipolar transistors, SiGe hetero-junction bipolar transistors, peak detector circuits and envelope detector circuits. Furthermore, as shown in FIG. 2, additional circuitry may be electrically connected to the output of the power detector module, including but not limited to, amplifiers 22 for signal amplification, filters to limit noise, anti-aliasing filters for analog-to-digital converters, clocked integrators, sample-and-hold circuits, and integrator or subtractor 23.

#FIG. 3 shows a block diagram illustrating another exemplary embodiment of the circuitry following the LNA module 11, in accordance with the preferred embodiment, while FIG. 4 shows a block diagram illustrating yet another exemplary embodiment of the circuitry following the LNA module 11. In FIG. 3, a power detector 31 drives an amplifier 32 whose output is provided to a integrator/subtractor 33. The output of the integrator/subtractor 33 is sampled by an ADC 34 and then processed by the DSP 35. Correspondingly, in FIG. 4, a power detector 41 drives an amplifier 42 whose output is provided to an ADC 43 and then processed by the DSP 44.