Semiconductor integrated circuit for generating clock signal(s)
AssigneeKabushiki Kaisha Toshiba
InventorsToshio Fujisawa, Hideo Kasami
Life of this patent
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Abstract
A semiconductor integrated circuit according to an embodiment includes a clock signal generation section, a clock waveform shaping section and a plurality of function blocks. The clock signal generation section generates a clock signal of a predetermined frequency. The clock waveform shaping section generates a plurality of clock signals having the same phase as a phase of the clock signal generated by the clock signal generation section at rising edges and different phases at falling edges. Each of the plurality of function blocks has a plurality of flip flops that operate with any one of the plurality of clock signals generated by the clock waveform shaping section.
Claims8
A semiconductor integrated circuit comprising:
- a clock signal generation section configured to generate a clock signal of a predetermined frequency;
- a clock waveform shaping section configured to generate a plurality of clock signals having the same phase as a phase of the clock signal generated by the clock signal generation section at rising edges and different phases at falling edges;
- and
- a plurality of function blocks having a plurality of flip flops configured to operate with anyone of the plurality of clock signals generated by the clock waveform shaping section,
- wherein the clock waveform shaping section comprises a counter configured to count up at rising edges of the clock signal and a plurality of combination circuits configured to output a specific value according to a count value counted by the counter.
Dependencies are inferred from the claim text.