Phase locked loop
AssigneeAeroflex International Co., Ltd.
InventorNeil Edwin Thomas
Life of this patent
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Abstract
A phase locked loop (10) comprising: a tuneable oscillator (12); a mixer-based phase sensitive detector (18) to receive input signals from the tuneable oscillator (12) and a reference signal (20); a cycle slip detector (26) to receive input signals from the tuneable oscillator (12) and the reference signal (20), the cycle slip detector (26) being configured to generate an output signal when two consecutive pulses are present in one of its input signals without an intervening pulse in the other of its input signals; coarse tune signal means (32, 34) to receive the output signal generated by the cycle slip detector; and adding means (24) for adding a signal output by the coarse signal means (32, 34) to a signal output by the phase sensitive detector (18) to control the frequency of the tuneable oscillator (12).
Claims7
A phase locked loop comprising:
- a tuneable oscillator;
- a mixer-based phase sensitive detector to receive input signals from the tuneable oscillator and a reference signal;
- a cycle slip detector to receive input signals from the tuneable oscillator and the reference signal, the cycle slip detector being configured to generate an output signal when two consecutive pulses are present in one of its input signals without an intervening pulse in the other of its input signals;
- coarse tune signal means to receive the output signal generated by the cycle slip detector;
- adding means for adding a signal output by the coarse tune signal means to a signal output by the phase sensitive detector to control the frequency of the tuneable oscillator;
- disabling means for selectively disabling the signal output by the phase sensitive detector;
- and
- enabling means comprising a timer for enabling the signal output by the phase sensitive detector.
A phase locked loop comprising:
- a tuneable oscillator;
- a mixer-based phase sensitive detector to receive input signals from the tuneable oscillator and a reference signal;
- a cycle slip detector to receive input signals from the tuneable oscillator and the reference signal, the cycle slip detector being configured to generate an output signal when two consecutive pulses are present in one of its input signals without an intervening pulse in the other of its input signals;
- coarse tune signal means to receive the output signal generated by the cycle slip detector, wherein the coarse tune signal means comprises a register and a digital to analogue converter, and wherein an output step of the digital to analogue converter is selected so as to bring about a change in the frequency of the output signal of the tuneable oscillator of approximately 50% of the loop bandwidth;
- and
- adding means for adding a signal output by the coarse tune signal means to a signal output by the phase sensitive detector to control the frequency of the tuneable oscillator.
Dependencies are inferred from the claim text.