Back to results
US 8,552,761 B2Granted
Flip-flop including keeper circuit
AssigneeSamsung Electronics Co., Ltd.
InventorMin Su Kim
Life of this patent
Estimating the term…
Abstract
A flip-flop includes a transmission circuit configured to transmit data to a transmission line in response to a clock signal and a complementary clock signal. The flip-flop further includes a keeper circuit configured to latch data of the transmission line in response to the clock signal and the complementary clock signal to maintain the data of the transmission line constant.
Claims12
A flip-flop comprising:
- a transmission circuit configured to transmit data to a transmission line in response to a clock signal;
- and
- a keeper circuit comprising:
- a first tri-state inverter configured to invert the data of the transmission line in response to the clock signal;
- a latch circuit configured to latch data output from the first tri-state inverter;
- and
- an inverter configured to transmit the latched data output from the latch circuit to the transmission line as an output of the flip-flop while the first tri-state inverter is turned off.
4 more elements
A flip-flop comprising:
- a first transmission circuit configured to transmit data to a first transmission line in response to a clock signal;
- a first latch circuit configured to latch data of the first transmission line;
- a second transmission circuit configured to transmit the data of the first transmission line to a second transmission line in response to the clock signal;
- and
- a keeper circuit configured to latch the data of the second transmission line in response to the clock signal, and to keep the data of the second transmission line constant,
- wherein the keeper circuit comprises:
- a tri-state inverter configured to invert the data of the second transmission line in response to the clock signal;
- a second latch circuit configured to latch data output from the tri-state inverter;
- and
- an inverter configured to transmit data output from the second latch circuit to the second transmission line as an output of the flip-flop while the tri-state inverter is turned off.
7 more elements
A flip-flop comprising:
- a first transmission circuit configured to transmit data to a first transmission line in response to a clock signal and a complementary clock signal;
- a first latch circuit configured to latch data of the first transmission line;
- a second transmission circuit configured to transmit the data of the first transmission line to a second transmission line in response to the data of the first transmission line and data of a third transmission line;
- and
- a keeper circuit configured to latch the data of the second transmission line constant in response to the clock signal, and to transmit latched data to the third transmission line,
- wherein the keeper circuit comprises:
- a tri-state inverter configured to invert and output the data of the second transmission line in response to the clock signal;
- a second latch circuit configured to latch data output from the tri-state inverter;
- a third transmission circuit configured to transmit data output from the second latch circuit to the third transmission line in response to the clock signal;
- a first precharge circuit configured to precharge the second transmission line in response to data of the third transmission line;
- and
- a second precharge circuit configured to precharge the third transmission line in response to the clock signal.
9 more elements
Dependencies are inferred from the claim text.