Stability methods and structures for current-mode DC-DC voltage converters

A voltage converter system to thereby generate an output voltage at an output port in response to an input voltage at an input port, comprising:

• a switching voltage converter arranged to switch through a first transistor a first current with a rising slope and subsequently switch through a second transistor a second current with a falling slope;
• a voltage feedback circuit arranged to generate an error voltage in response to the difference between said output voltage and a reference voltage;
• a current feedback circuit arranged to provide a feedback voltage ramp in proportional response to said rising slope;
• and
• a controller configured to sum a compensation voltage ramp having a compensation rising slope with said feedback voltage ramp to provide a summed voltage ramp to compare with said error voltage to thereby control duty cycles of said first and second transistors;
• wherein said first transistor is switched on for a controlled time period to obtain said output voltage and wherein said controller includes:
• a current generator to provide a compensation current related to said controlled time period;
• a capacitor to provide said compensation voltage ramp in response to said compensation current;
• and
• a summer to provide said summed voltage ramp in response to said feedback voltage ramp and said compensation voltage ramp;
• wherein said current feedback circuit includes:
• a resistor coupled to said input port to sense said first current;
• and
• a differential amplifier to provide said feedback voltage ramp in response to a voltage across said resistor;
• and
• wherein said capacitor has a capacitance C, said resistor has a resistance R, said rising slope has an amplitude that is a portion r of a maximum current Imax at said output port, k is a constant less than one, and said current generator is configured to provide said compensation current in accordance with the relationship:
• compensation
• ⁢
• ⁢
• current
• =
• k
• ⁢
• C
• ⁢
• ⁢
• Rr
• ⁢
• ⁢
• I
• max
• D
• ′
• ⁢
• T
• .

A voltage converter system to thereby generate an output voltage at an output port in response to an input voltage at an input port, comprising:

• a switching voltage converter arranged to switch, for a controlled time period, through a first transistor a first current with a rising slope and subsequently switch through a second transistor a second current with a falling slope;
• a voltage feedback circuit arranged to generate an error voltage in response to the difference between said output voltage and a reference voltage;
• a current feedback circuit arranged to provide a feedback voltage ramp in proportional response to said rising slope;
• a duty generator configured to obtain a controlled time period during which said first transistor is switched on;
• a current generator coupled to provide a compensation current related to said controlled time period;
• a capacitor coupled to provide, in response to said compensation current, a compensation voltage ramp having a compensation rising slope;
• and
• a summer to provide, in response to said feedback voltage ramp and said compensation voltage ramp, a summed voltage ramp to compare with said error voltage to thereby control duty cycles of said first and second transistors;
• wherein the compensation rising slope of said compensation voltage ramp is less than said falling slope.

A method to generate an output voltage at an output port in response to an input voltage at an input port, comprising the steps of:

• switching through a first transistor a first current with a rising slope and subsequently switch through a second transistor a second current with a falling slope;
• with a voltage feedback circuit, generating an error voltage in response to the difference between said output voltage and a reference voltage;
• with a current feedback circuit, providing a feedback voltage ramp in proportional response to said rising slope;
• and
• summing a compensation voltage ramp having a compensation rising slope with said feedback voltage ramp to provide a summed voltage ramp to compare with said error voltage to thereby control duty cycles of said first and second transistors;
• wherein the compensation rising slope of said compensation voltage ramp is less than said falling slope.