MOS transistor device in common source configuration
AssigneeTexas Instruments Incorporated
InventorsJacek Korec, Stephen L. Colino
Life of this patent
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Abstract
A semiconductor device includes a semiconductor substrate, a first p-channel laterally diffused metal oxide semiconductor (LDMOS) transistor formed over the semiconductor substrate and additional p-channel LDMOS transistors formed over the semiconductor substrate. First drain and gate electrodes are formed over the substrate and are coupled to the first LDMOS transistor. Additional drain and gate electrodes are formed over the substrate and are coupled to the second LDMOS transistor. A common source electrode for the first and second LDMOS transistors is also formed over the substrate.
Claims7
A flip chip semiconductor device comprising:
- a die, comprising:
- a highly doped semiconductor substrate having top and bottom surfaces;
- an epitaxial layer formed over said top surface of said substrate;
- a first p-channel laterally diffused metal oxide semiconductor (LDMOS) transistor formed over said top surface of said semiconductor substrate;
- at least one second p-channel LDMOS transistors formed over said top surface of said semiconductor substrate;
- first drain and gate electrodes formed over said top surface of said substrate and electrically coupled to said first LDMOS transistor;
- second drain and gate electrodes formed over said top surface of said substrate and electrically coupled to said second LDMOS transistor;
- and
- one or more common source electrodes formed over said top surface of said substrate and electrically coupled to said first and second LDMOS transistors,
- a first conductor electrically coupling a source region of said first LDMOS transistor to said substrate through said epitaxial layer;
- a second conductor electrically coupling a source region of said second LDMOS transistor to said substrate through said epitaxial layer;
- and
- a third conductor electrically coupling said substrate to said one or more common source electrodes through said epitaxial layer;
- a passivation layer formed over said die;
- and
- a plurality of conductive bumps formed over said passivation layer and electrically coupled to said electrodes.
Dependencies are inferred from the claim text.