Semiconductor device, and inspection method thereof

A semiconductor device comprising a multi-layer substrate, which includes a first layer and a second layer physically connected to the first layer, the semiconductor device having a first surface on the first layer and a second surface on the second layer and opposing the first surface, the semiconductor device further comprising:

• a semiconductor chip flip-chip mounted on the first surface;
• a plurality of connection terminals disposed on the first surface, the plurality of connection terminals comprising connection terminals at a central area of the first surface connected to the semiconductor chip and other connection terminals at a peripheral area of the first surface located around the semiconductor chip and being capable of stacking a semiconductor device on the multi-layer substrate, wherein the other connection terminals at the peripheral area include a first connection terminal;
• first and second external electrodes on the second surface of the multi-layer substrate;
• a first via portion connecting the first connection terminal to the first external electrode;
• and
• a second via portion connecting the first connection terminal to the second external electrode,
• wherein a connection of the first via portion, the first connection terminal, and the second via portion forms a single route electrically between the first external electrode and the second external electrode, and
• the first via portion comprising a first via, a first wiring, and a second via disposed on an inner layer of the multi-layer substrate, the first via connects with the first connection terminal, the first wiring connects with the first via, and the second via connects the first wiring to the first external electrode.

A semiconductor device comprising a multi-layer substrate having a first surface and a second surface opposing the first surface, the semiconductor device further comprising:

• a semiconductor chip flip-chip mounted on the first surface;
• a plurality of connection terminals disposed on the first surface, the plurality of connection terminals comprising central connection terminals at a central area of the first surface connected to the semiconductor chip and peripheral connection terminals at a peripheral area of the first surface located around the semiconductor chip and being capable of stacking a semiconductor device on the multi-layer substrate, wherein the peripheral connection terminals include a first connection terminal and a second connection terminal disposed inside the first connection terminal in plan view;
• first and second external electrodes on the second surface of the multi-layer substrate;
• a first via portion connecting the first connection terminal to the first external electrode;
• and
• a second via portion connecting the first connection terminal to the second external electrode,
• wherein a connection of the first via portion, the first connection terminal, and the second via portion forms a single route electrically between the first external electrode and the second external electrode.

A semiconductor device comprising a multi-layer substrate having a first surface and a second surface opposing the first surface, the semiconductor device further comprising:

• a semiconductor chip flip-chip mounted on the first surface;
• a plurality of connection terminals disposed on the first surface, the plurality of connection terminals comprising connection terminals at a central area of the first surface connected to the semiconductor chip and other connection terminals at a peripheral area of the first surface located around the semiconductor chip and being capable of stacking a semiconductor device on the multi-layer substrate, wherein the other connection terminals at the peripheral area include a first connection terminal;
• first and second external electrodes on the second surface of the multi-layer substrate;
• a first wiring disposed on an inner layer of the multi-layer substrate;
• a first via connecting the first connection terminal to the first wiring;
• a second via connecting the first wiring to the first external electrode;
• and
• a third via penetrating the plurality layers in the multi-layer substrate and electrically connecting the first connection terminal to the second external electrode,
• wherein a connection of the first via, the first wiring, the second via, the first connection terminal, and the third via forms a single route electrically between the first external electrode and the second external electrode.