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US 8,552,492 B2Granted
Semiconductor device
AssigneeRenesas Electronics Corporation
InventorsKazuhiko Sanada, Hiroshi Kawaguchi
Life of this patent
Estimating the term…
Abstract
A trench gate transistor whose gate changes the depth thereof intermittently in the gate width direction, has a first offset region and a second offset region formed below the source and drain, respectively. The sum of length measurements of the underlying portion of the second offset region measured from the lower corner of the trench in a direction parallel to the substrate and in a direction perpendicular to the substrate is 0.1 μm or greater.
Claims19
A semiconductor device comprising:
- a substrate;
- a source region and a drain region, both of which are of a first conductivity and arranged in the substrate;
- a channel region of a second conductivity arranged, in the substrate, in a first direction between the source region and the drain region;
- a first low-concentration region of the first conductivity formed in the substrate between the source region and the channel region and having a first conductivity dopant concentration lower than the first conductivity dopant concentration of the source region;
- a second low-concentration region of the first conductivity formed in the substrate between the drain region and the channel region and having a first conductivity dopant concentration lower than the first conductivity dopant concentration of the drain region;
- a trench formed in the substrate between the first low-concentration region and the second low-concentration region and having a side surface extending in the first direction between the first low-concentration region and the second low-concentration region, underlying a portion of a bottom of the trench including a lower corner portion thereof, the first and second low concentration regions both being in contact the bottom and sides of the trench;
- a gate insulating film formed in the bottom and the side surface of the trench;
- and
- a gate electrode formed in the trench through the gate insulating film such that the first direction of the gate electrode serves as a gate length direction,
- wherein a depth direction, in the substrate, of the gate electrode serves as a gate width direction such that a portion of the channel region sideward, in a second direction crossing the first direction in a plane view of the substrate, from the side surface of the trench is arranged between the first low-concentration region and the second low-concentration region,
- wherein a portion of the second low-concentration region extends under the bottom of the trench and extends beyond a width of the gate insulation film formed in the side surface of the trench so as to cover the lower corner portion such that a sum of length measurements of the underlying portion of the second low-concentration region measured from the lower corner portion of the trench in the first direction parallel to the substrate and in a depth direction perpendicular to the substrate is 0.1 μm or greater.
8 more elements
A semiconductor device comprising:
- a substrate;
- a source region and a drain region, both of which are of a first conductivity and arranged in the substrate;
- a channel region of a second conductivity arranged, in the substrate, in a first direction between the source region and the drain region;
- a first low-concentration region of the first conductivity formed in the substrate between the source region and the channel region and having a first conductivity dopant concentration lower than the first conductivity dopant concentration of the source region;
- a second low-concentration region of the first conductivity formed in the substrate between the drain region and the channel region and having a first conductivity dopant concentration lower than the first conductivity dopant concentration of the drain region;
- a trench formed in the substrate between the first low-concentration region and the second low-concentration region and having a side surface extending in the first direction between the first low-concentration region and the second low-concentration region, underlying a portion of a bottom of the trench including a lower corner portion thereof, the first and second low concentration regions both being in contact the bottom and sides of the trench;
- a gate insulating film formed in the trench;
- and
- a gate electrode formed in the trench through the gate insulating film such that the first direction of the gate electrode serves as a gate length direction,
- wherein a depth direction, in the substrate, of the gate electrode serves as a gate width direction such that a portion of the channel region sideward, in a second direction crossing the first direction in a plane view of the substrate, from the side surface of the trench is arranged between the first low-concentration region and the second low-concentration region,
- wherein underlying portion of the second low-concentration region is delimited from the channel region by a boundary surface that is offset from said lower corner portion of the trench to extend past a width of the gate insulating film formed at the sides of the trench and that extends along a curved path from a lower position beneath the lower corner portion to an upper position meeting the at least one section of the trench at a location offset from the lower corner portion toward a middle of the channel region along the gate length direction, wherein the boundary surface is offset from the lower corner portion by a distance y is a direction perpendicular to a main surface of the substrate and extending further into said substrate from a device side of the substrate, and by a distance x is a direction parallel to a main surface of said substrate and extending toward a center of the channel region along a gate length thereof, wherein a sum of x and y is at least 0.1 μm.
8 more elements
A semiconductor device comprising:
- a first semiconductor region of a first conductivity formed in a substrate and serving as a source region;
- a second semiconductor region of the first conductivity formed in the substrate and serving as a drain region;
- a channel region of a second conductivity arranged, in the substrate, in a first direction between the first semiconductor region and the second semiconductor region;
- a trench formed in the substrate between a first low-concentration region and a second low-concentration region and having a side surface extending in the first direction between the first low-concentration region and the second low-concentration region, underlying a portion of a bottom of the trench including a lower corner portion thereof, the first and second low concentration regions both being in contact the bottom and sides of the trench;
- a gate insulating film formed in the bottom and sides of the trench;
- and
- a gate electrode formed in the trench through the gate insulating film such that the first direction of the gate electrode serves as a gate length direction,
- wherein a depth direction, in the substrate, of the gate electrode serves as a gate width direction such that a portion of the channel region sideward, in a second direction crossing the first direction in a plane view of the substrate, from the side surface of the trench is arranged between the first low-concentration region and the second low-concentration region,
- wherein a portion of the second low-concentration region extends under the bottom of the trench and extends beyond a width of the gate insulation film formed in the sides of the trench so as to cover the lower corner portion such that a sum of length measurements of the underlying portion of the second low-concentration region measured from the lower corner portion of the trench in the first direction parallel to the substrate and in a depth direction perpendicular to the substrate is 0.1 μm or greater.
6 more elements
Dependencies are inferred from the claim text.