Nonvolatile memory device with a high-K charge storage layer having a U-shaped,cross-sectional structure

A manufacturing method of a nonvolatile memory device, comprising:

• providing a substrate, wherein a memory cell region is defined on the substrate;
• forming a first stacked gate structure disposed on the memory cell region of the substrate, wherein steps of forming the first stacked gate structure comprise:
• forming a tunneling dielectric layer on the substrate, and forming a dummy gate on the tunneling dielectric layer;
• forming a spacer on the dummy gate;
• forming an interlayer dielectric layer around the dummy gate, and removing the dummy gate to form an opening;
• forming a charge storage layer on an inner sidewall of the opening and on the tunneling dielectric layer;
• forming an inter-gate dielectric layer on the charge storage layer, wherein the inter-gate dielectric layer covers the charge storage layer to form a U-shaped cross-sectional structure;
• and
• forming a first metal gate having a first sidewall on the inter-gate dielectric layer, wherein the metal gate has a sidewall overlapped with the spacer, and the overlapped sidewall is entirely surrounded by the inter-gate dielectric layer;
• forming a barrier metal layer between the first metal gate and the inter-gate dielectric layer, wherein the barrier metal layer is under the first metal gate, and extends upwardly along the first sidewall of the first metal gate;
• and
• forming a source region and a drain region in the substrate, wherein the source region and the drain region are respectively disposed at two opposite sides of the first stacked gate structure.