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US 8,552,482 B2Granted
Single photon avalanche diodes
AssigneeSTMicroelectronics (Research & Development) Limited
InventorsRobert K. Henderson, Justin Richardson
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Abstract
A CMOS single photon avalanche diode (SPAD) design uses conventional, or at least known, CMOS processes to produce a device having a breakdown region in which the main p-n junction is formed of a deep n-well layer, and optionally on the other side, a p-add layer. The SPAD may also have a guard ring region which comprises the p-epi layer without any implant. The SPAD may have curved or circular perimeters. A CMOS chip comprises SPADs as described and other NMOS devices all sharing the same deep n-well.
Claims27
A CMOS chip comprising:
- at least one single photon avalanche diode;
- and
- at least one other device,
- said single photon avalanche diode comprising a main p-n junction and a deep well implant, said deep well implant being shared with said at least one other device,
- wherein a breakdown voltage of said main p-n junction is lower in magnitude than any other p-n junction formed in the single photon avalanche diode and lower in magnitude than any other p-n junction formed in, or as a result of, said at least one other device which shares said deep well implant.
2 more elements
Dependencies are inferred from the claim text.