# US 8,544,089 B2 · Auditing a device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 8,544,089 B2 - Document ID: US8544089B2 - Status: Granted - Kind: B2 - Application number: 12/714,547 - Filed: 2010-03-01 - Published: 2011-02-17 - Granted: 2013-09-24 - Earliest claimed: 2009-08-17 - Assignees: Fatskunk, Inc. - Applicants: Bjorn Markus Jakobsson; Karl-Anders R. Johansson - Inventors: Bjorn Markus Jakobsson; Karl-Anders R. Johansson - Web page: https://patentgrep.com/patent/US8544089B2 ## CPC - G06F 21/56: Computer malware detection or handling, e.g. anti-virus arrangements - G06F 21/566: {Dynamic detection, i.e. detection performed at run-time, e.g. emulation, suspicious activities} - G06F 21/57: Certifying or maintaining trusted computer platforms, e.g. secure boots or power-downs, version controls, system software checks, secure updates or assessing vulnerabilities - H04W 12/122: Counter-measures against attacks; Protection against rogue devices - H04W 12/128: Anti-malware arrangements, e.g. protection against SMS fraud or mobile malware - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) - H04W: WIRELESS COMMUNICATION NETWORKS (broadcast communication H04H; communication systems using wireless links for non-selective communication, e.g. wireless extensions H04M1/72) ## Abstract The auditing of a device that includes a physical memory is disclosed. One or more hardware parameters that correspond to a hardware configuration is received. Initialization information is also received. The physical memory is selectively read and at least one result is determined. The result is provided to a verifier. ## Claims ### Claim 1 A system, comprising: a physical memory; and a processor configured to: receive one or more hardware parameters that correspond to a hardware configuration and receive initialization information, wherein the one or more hardware parameters include at least one of an amount and a speed of the physical memory; perform a sequence of operations, wherein the sequence of operations includes at least writing a portion of the physical memory and selectively reading the physical memory; determine at least one result based at least in part on the performed sequence of operations, wherein the at least one result includes a checksum; and provide the at least one result to a verifier. ### Claim 2 (depends on 1) The system of claim 1 wherein the initialization information comprises a seed value. ### Claim 3 (depends on 1) The system of claim 1 wherein the initialization information comprises a step value. ### Claim 4 (depends on 1) The system of claim 1 wherein the initialization information is received from a proxy. ### Claim 5 (depends on 1) The system of claim 1 wherein the initialization information is received from an external verifier. ### Claim 6 (depends on 1) The system of claim 1 wherein the initialization information is a representation of a phenomenon. ### Claim 7 (depends on 6) The system of claim 6 wherein the initialization information is received from an accelerometer included in the system. ### Claim 8 (depends on 6) The system of claim 6 wherein the processor is configured to receive the initialization information at least in part by measuring a phenomenon. ### Claim 9 (depends on 1) The system of claim 1 wherein the processor is further configured to determine a portion of the physical memory to be overwritten in accordance with a function. ### Claim 10 (depends on 1) The system of claim 1 wherein the processor is further configured to write a portion of the physical memory in accordance with a function. ### Claim 11 (depends on 1) The system of claim 1 wherein the processor is configured to selectively read the physical memory based at least in part on a step counter. ### Claim 12 (depends on 11) The system of claim 11 wherein the step counter is relatively prime to a measurement of the size of the physical memory. ### Claim 13 (depends on 11) The system of claim 11 further comprising a plurality of processors and wherein the step counter is relatively prime to a measurement of the size of the physical memory multiplied by the number of processors. ### Claim 14 (depends on 1) The system of claim 1 wherein the processor is configured to determine the result at least in part by using a function that is not the identity function and takes as input a portion of the physical memory. ### Claim 15 (depends on 1) The system of claim 1 wherein the processor is configured to determine the result at least in part by using an accumulator. ### Claim 16 (depends on 14) The system of claim 14 wherein the accumulator includes a nonlinear function. ### Claim 17 (depends on 14) The system of claim 14 wherein the accumulator uses an XOR and a rotate. ### Claim 18 (depends on 1) The system of claim 1 wherein the processor is configured to provide the result to the verifier at least in part by providing information to a proxy. ### Claim 19 A method, comprising: receiving one or more hardware parameters that correspond to a hardware configuration and receiving initialization information, wherein the one or more hardware parameters include at least one of an amount and a speed of a physical memory; performing, using a hardware processor, a sequence of operations, wherein the sequence of operations includes at least writing a portion of the physical memory and selectively reading a physical memory; determining at least one result based at least in part on the performed sequence of operations, wherein the at least one result includes a checksum; and providing the at least one result to a verifier. ### Claim 20 A computer program product embodied in a non-transitory computer readable storage medium and comprising computer instructions for: receiving one or more hardware parameters that correspond to a hardware configuration and receiving initialization information, wherein the one or more hardware parameters include at least one of an amount and a speed of a physical memory; performing a sequence of operations, wherein the sequence of operations includes at least writing a portion of the physical memory and selectively reading a physical memory and determining at least one result; and determining at least one result based at least in part on the performed sequence of operations, wherein the at least one result includes a checksum; and providing the at least one result to a verifier.