# US 8,544,006 B2 · Resolving conflicts by restarting execution of failed discretely executable subcomponent using register and memory values generated by main component after the occurrence of a conflict > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 8,544,006 B2 - Document ID: US8544006B2 - Status: Granted - Kind: B2 - Application number: 11/959,821 - Filed: 2007-12-19 - Published: 2009-06-25 - Granted: 2013-09-24 - Earliest claimed: 2007-12-19 - Assignees: International Business Machines Corporation - Applicants: Robert H. Bell, Jr.; Louis Bennie Capps, Jr.; Michael A. Paolini; Michael Jay Shapiro - Inventors: Robert H. Bell, Jr.; Louis Bennie Capps, Jr.; Michael A. Paolini; Michael Jay Shapiro - Web page: https://patentgrep.com/patent/US8544006B2 ## CPC - G06F 9/3842: {Speculative instruction execution} - G06F 9/3851: {from multiple instruction streams, e.g. multistreaming} - G06F 9/505: {considering the load} - G06F 2209/5017: Task decomposition - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract A method and apparatus for speculatively executing a single threaded program within a multi-core processor which includes identifying an idle core within the multi-core processor, performing a look ahead operation on the single thread instructions to identify speculative instructions within the single thread instructions, and allocating the idle core to execute the speculative instructions. ## Claims ### Claim 1 A method for executing a single threaded program within a multi-core processor comprising: dividing the single threaded program into a plurality of discretely executable components, the plurality of discretely executable components comprising a main component and a plurality of discretely executable sub-components, the main component corresponding to a parent thread and the plurality of discretely executable sub-components corresponding to respective speculative sub-threads of the single threaded program, the dividing further comprising dividing the single threaded program by an operating system at function boundaries; generating a graph of relationships between the plurality of discretely executable components, the graph identifying the main component and the plurality of discretely executable sub-components; assigning the main component to execute on a first core of the multi-core processor; and, assigning each of the plurality of discretely executable sub-components to execute on at least one idle core of the multi-core processor; and managing conflicts between each of the plurality of discretely executable components via the graph, the conflicts comprising at least one of register conflicts and memory conflicts. ### Claim 2 (depends on 1) The method of claim 1, wherein: the dividing further comprises dividing the single threaded program by an operating system at dynamic linking library (DLL) boundaries. ### Claim 3 (depends on 1) The method of claim 1, further comprising: if conflicts occur, discarding results from a particular discretely executable sub-component of the plurality of discretely executable component; and, restarting execution of the particular discretely executable sub-component with register and memory location values generated based upon the main component execution after a determination that a conflict has occurred. ### Claim 4 An apparatus comprising a multi-core processor for executing a single threaded program, the apparatus comprising: means for dividing the single threaded program into a plurality of discretely executable components, the plurality of discretely executable components comprising a main component and a plurality of discretely executable sub-components, the main component corresponding to a parent thread and the plurality of discretely executable sub-components corresponding to respective speculative sub-threads of the single threaded program, the means for dividing further comprising means for dividing the single threaded program by an operating system at function boundaries; means for generating a graph of relationships between the plurality of discretely executable components, the graph identifying the main component and the plurality of discretely executable sub-components; means for assigning the main component to execute on a first core of the multi-core processor; and, means for assigning each of the plurality of discretely executable sub-components to execute on at least one idle core of the multi-core processor; and, means for managing conflicts between each of the plurality of discretely executable components via the graph, the conflicts comprising at least one of register conflicts and memory conflicts. ### Claim 5 (depends on 4) The apparatus of claim 4, wherein: the means for dividing further comprises means for dividing the single threaded program by an operating system at dynamic linking library (DLL) boundaries. ### Claim 6 (depends on 4) The apparatus of claim 4, further comprising: means for discarding results from a particular discretely executable sub-component of the plurality of discretely executable component if conflicts occur; and, means for restarting execution of the particular discretely executable sub-component with register and memory location values generated based upon the main component execution after a determination that a conflict has occurred. ### Claim 7 A data processing system comprising: a multi-core processor; memory coupled to the multi-core processor, the memory comprising a single threaded optimization system for optimizing execution of a single threaded program on a multi-core processor, the single threaded optimization system comprising instructions executable by the multi-core processor for: dividing the single threaded program into a plurality of discretely executable components, the plurality of discretely executable components comprising a main component and a plurality of discretely executable sub-components, the main component corresponding to a parent thread and the plurality of discretely executable sub-components corresponding to respective speculative sub-threads of the single threaded program, the dividing further comprising dividing the single threaded program by an operating system at function boundaries; generating a graph of relationships between the plurality of discretely executable components, the graph identifying the main component and the plurality of discretely executable sub-components; assigning the main component to execute on a first core of the multi-core processor; and, assigning each of the plurality of discretely executable sub-components to execute on at least one idle core of the multi-core processor; and, managing conflicts between each of the plurality of discretely executable components via the graph, the conflicts comprising at least one of register conflicts and memory conflicts. ### Claim 8 (depends on 7) The data processing system of claim 7, the instructions for dividing further comprise instructions for: dividing further comprises means for dividing the single threaded program by an operating system at dynamic linking library (DLL) boundaries. ### Claim 9 (depends on 7) The data processing system of claim 7, the single threaded optimization system further comprise instructions for: discarding results from a particular discretely executable sub-component of the plurality of discretely executable component if conflicts occur; and, restarting execution of the particular discretely executable sub-component with register and memory location values generated based upon the main component execution after a determination that a conflict has occurred.