# US 8,543,780 B2 · Method of verifying system performance and performance measurement apparatus > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 8,543,780 B2 - Document ID: US8543780B2 - Status: Granted - Kind: B2 - Application number: 13/189,697 - Filed: 2011-07-25 - Published: 2012-02-23 - Granted: 2013-09-24 - Earliest claimed: 2010-08-19 - Assignees: Fujitsu Limited - Applicants: Shintarou Suzuki - Inventors: Shintarou Suzuki - Web page: https://patentgrep.com/patent/US8543780B2 ## CPC - G06F 11/3414: {Workload generation, e.g. scripts, playback} - G06F 11/3428: {Benchmarking} - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract A computer-readable, non-transitory medium storing a program for measuring a performance in a system including a storage unit and a plurality of control units for controlling an access to the storage unit, the program causing a computer to execute a procedure, the procedure includes estimating a specification area in address information including an address area in which an address of an access target of the storage unit is set and the specification area in which specification information for specifying a control unit for controlling an access to the access target is set, and verifying a reliability of the system by accessing the storage unit on the basis of a specification information in the specification area. ## Claims ### Claim 1 A computer-readable, non-transitory medium storing a program for measuring a performance in a system including a storage and a plurality of controllers, the program causing a computer to execute a process, the process comprising: estimating a specification area for address information including an address area in which an address of an access target in the storage is set and an information area in which specification information for specifying a first controller to control an access to the access target from among the plurality of controllers is set; and verifying a reliability of the system by accessing the storage based on the specification information in the specification area. ### Claim 2 (depends on 1) The computer-readable, non-transitory medium according to claim 1, wherein the estimating includes generating a plurality of addresses based on a plurality of states in which a value of the address information is fixed in different partial areas, respectively, measuring a performance of the system by respectively accessing the plurality of addresses generated by the generating in each state, and estimating the specification area based on the performance measurement result and the different partial areas in each state. ### Claim 3 (depends on 2) The computer-readable, non-transitory medium according to claim 2, wherein the verifying includes randomly generating a plurality of address information, sorting the plurality of address information generated by the randomly generating based on the specification information, and accessing the plurality of addresses generated by the generating based on the plurality of address information sorted by the sorting. ### Claim 4 (depends on 2) The computer-readable, non-transitory medium according to claim 2, wherein the estimating includes specifying a performance measurement result of a first state from among the plurality of the states as an estimation target when the performance measurement result of the first state is decreased with respect to a reference performance measurement result, and estimating the specification area based on the partial area in the address information used when measuring the performance of the estimation target. ### Claim 5 (depends on 4) The computer-readable, non-transitory medium according to claim 4, wherein the performance measurement result of the first state is specified as the estimation target when the amount of the performance measurement result decreased from the reference performance measurement result falls within a specified range. ### Claim 6 (depends on 5) The computer-readable, non-transitory medium according to claim 5, wherein the estimating includes estimating that an abnormality of the system occurs when the decreased amount of the performance measurement result exceeds the specified range. ### Claim 7 (depends on 1) The computer-readable, non-transitory medium according to claim 1, wherein the estimating includes generating the plurality of addresses based on a plurality of states in which values of bits within the address information are fixed from the values of the lower bits in a specified order, measuring the performance of the system by accessing the storage based on the plurality of addresses generated by the generating, and estimating the specification area based on the performance measurement result in each state and a location of the bits in the address generated by the generating where the values of bits are fixed. ### Claim 8 (depends on 7) The computer-readable, non-transitory medium according to claim 7, wherein the estimating includes generating the plurality of addresses by sequentially adding a specified bit value to a reference address, the specified bit value being fixed in a respective state. ### Claim 9 (depends on 8) The computer-readable, non-transitory medium according to claim 8, wherein the estimating includes specifying the performance measurement result of a first state from among the plurality of the states as an estimation target in case that the performance measurement result of the first state is decreased with respect to the reference performance measurement result, and the specification area is estimated based on the specified bit value which is used when measuring the performance measurement result of the estimation target specified by the specifying. ### Claim 10 (depends on 9) The computer-readable, non-transitory medium according to claim 9, wherein the most significant bit of the specified bit is “1” and the values of the other bits are all “0”, and the estimating includes estimating one bit in the address information as the specification area, the one bit corresponding to a location of a next bit after most significant bit, the next bit being used when measuring the performance of the estimation target. ### Claim 11 (depends on 10) The computer-readable, non-transitory medium according to claim 10, wherein the estimating includes generating the plurality of addresses while suppressing a fixture of the value of a bit which is estimated as the specification area when the bit in the address information as the specification area is estimated. ### Claim 12 (depends on 7) The computer-readable, non-transitory medium according to claim 7, wherein the accessing includes mutually changing an access width corresponding to each state. ### Claim 13 A method of verifying a system including a storage and a plurality of controllers, the method comprising: estimating a specification area for address information including an address area in which an address of an access target in the storage is set and an information area in which specification information for specifying a first controller to control an access to the access target from among the plurality of controllers is set; and verifying a reliability of the system by accessing the storage based on the specification information in the specification area. ### Claim 14 (depends on 13) The method according to claim 13, wherein the estimating includes generating a plurality of addresses based on a plurality of states in which value of the address information is fixed in different partial areas, respectively, measuring a performance of the system by respectively accessing the plurality of addresses generated by the generating in each state, and estimating the specification area based on the performance measurement result and the different partial areas each state. ### Claim 15 (depends on 14) The method according to claim 14, wherein the verifying includes randomly generating a plurality of address information, sorting the plurality of address information generated by the randomly generating based on the specification information, and accessing the plurality of addresses generated by the generating based on the plurality of address information sorted by the sorting. ### Claim 16 A performance measurement apparatus for measuring a performance in a system including a storage and a plurality of controllers, the measuring performance apparatus comprising: a memory; and a processor coupled to the memory and configured to: estimate a specification area for address information including an address area in which an address of an access target in the storage is set and an information area in which specification information for specifying a first controller to control an access to the access target among the plurality of controllers is set, and verify a reliability of the system by accessing the storage based on the specification information. ### Claim 17 (depends on 16) The performance measurement apparatus according to claim 16, wherein the processor is configured to access to the plurality of controllers and the storage via an Input/Output channel included in the system.