# US 8,543,744 B2 · A/D converter and programmable controller system

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 8,543,744 B2
- Document ID: US8543744B2
- Status: Granted
- Kind: B2
- Application number: 13/202,507
- Filed: 2009-03-23
- Published: 2011-12-15
- Granted: 2013-09-24
- Earliest claimed: 2009-03-23
- Assignees: Mitsubishi Electric Corporation
- Applicants: Atsuko Onishi; Yoshiyuki Kubota; Satoru Ukena; Shigeaki Takase
- Inventors: Atsuko Onishi; Yoshiyuki Kubota; Satoru Ukena; Shigeaki Takase
- Web page: https://patentgrep.com/patent/US8543744B2

## CPC

- G05B 19/054: {Input/output}
- G05B 2219/15118: Shared memory
- G05B 2219/21137: Analog to digital conversion, ADC, DAC
- G05B: CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS (systems for controlling or regulating non-electric variables G05D; systems for regulating electric or magnetic variables G05F; control devices or systems insofar as characterised by mechanical features only G05G)

## Abstract

An A/D converter that is attached to a programmable controller (PLC) and sequentially converts an analog value inputted from outside into a digital value. The A/D converter includes: a shared memory that can read-access from a CPU unit that controls the entire PLC and includes a log storage area with a ring buffer configuration for sequentially logging the digital value and a parameter storage area for storing a head pointer serving as a parameter indicating a position where a next log data is stored; and a logging executing unit that writes a digital value in an address indicated by the head pointer in the log storage area as log data and updates the head pointer.

## Claims

### Claim 1

An analog/digital (A/D) converter that is attached to a programmable controller (PLC) and sequentially converts an analog value inputted from outside into a digital value, the A/D converter comprising:
a shared memory that is read-accessed from a CPU unit that controls the entire PLC and includes a log storage area with a ring buffer configuration for sequentially logging the digital value and a parameter storage area for storing a head pointer serving as a parameter indicating a position where a next log data is stored; and
a logging executing unit that writes a digital value in an address indicated by the head pointer in the log storage area as log data, updates the head pointer, and after stopping logging, changes storage positions of respective log data stored in the log storage area based on the head pointer to arrange the positions in a time series.

### Claim 2 (depends on 1)

The A/D converter according to claim 1, wherein where a predetermined trigger is detected, when number of log data logged after a point of time when the trigger is detected reaches a predetermined number, the logging executing unit stops logging.

### Claim 3 (depends on 2)

The A/D converter according to claim 2, wherein the predetermined trigger is one of signals in a group including an internal signal of the PLC, an input signal inputted from outside, a signal generated when an A/D conversion value is larger or less than a predetermined value, a regular signal using internal clock information of the PLC, a buffer full signal for stopping logging when no space is left in a capacity of the log storage area, and a signal generated when the A/D converter detects an alarm generated by the A/D converter.