# US 8,543,738 B2 · Hardware support for software controlled fast reconfiguration of performance counters > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 8,543,738 B2 - Document ID: US8543738B2 - Status: Granted - Kind: B2 - Application number: 13/564,270 - Filed: 2012-08-01 - Published: 2012-12-06 - Granted: 2013-09-24 - Earliest claimed: 2010-01-08 - Assignees: International Business Machines Corporation - Applicants: Valentina Salapura; Robert W. Wisniewski - Inventors: Valentina Salapura; Robert W. Wisniewski - Web page: https://patentgrep.com/patent/US8543738B2 ## CPC - G06F 11/348: {Circuit details, i.e. tracer hardware} - G06F 2201/88: Monitoring involving counting - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract Hardware support for software controlled reconfiguration of performance counters may include a plurality of performance counters collecting one or more counts of one or more selected activities. A storage element stores data value representing a time interval, and a timer element reads the data value and detects expiration of the time interval based on the data value and generates a signal. A plurality of configuration registers stores a set of performance counter configurations. A state machine receives the signal and selects a configuration register from the plurality of configuration registers for reconfiguring the one or more performance counters. ## Claims ### Claim 1 A device for providing hardware support for reconfiguring performance counters in a computer system, comprising: a plurality of performance counters operable to collect one or more counts of one or more selected activities; a plurality of configuration registers operable to store a set of performance counter configurations; a first multiplexer connected to the plurality of registers; and a state machine connected to the first multiplexer, the state machine operable to select via the first multiplexer a configuration register from the plurality of configuration registers for reconfiguring the one or more performance counters. ### Claim 2 (depends on 1) The device of claim 1, further including a storage element operable to store data value representing time interval; a timer element operable to read the data value and detect expiration of the time interval based on the data value, the timer element further operable to generate a signal, wherein the state machine is operable to receive the signal and select the configuration register in response to receiving the signal. ### Claim 3 (depends on 1) The device of claim 1, further including a second multiplexer connected to the first multiplexer, the second multiplexer selecting a set of activities to pass to the one or more performance counters based on configuration setting of the selected configuration register in the first multiplexer. ### Claim 4 (depends on 1) The device of claim 1, wherein the storage element is a register. ### Claim 5 (depends on 1) The device of claim 1, wherein the storage element is a memory location. ### Claim 6 (depends on 1) The device of claim 1, further including a second storage element storing a value indicating the number of times to perform reconfiguring of the one or more performance counters. ### Claim 7 (depends on 6) The device of claim 6, wherein the value is programmable by software. ### Claim 8 (depends on 1) The device of claim 1, further including a second storage element storing an on or off bit indicating whether to perform reconfiguring. ### Claim 9 (depends on 8) The device of claim 8, wherein the on or off bit is programmable by software. ### Claim 10 (depends on 1) The device of claim 1, further including a third storage element storing a value indicating whether to clear one or more of the plurality of performance counters. ### Claim 11 (depends on 10) The device of claim 10, wherein the value includes an on or off bit. ### Claim 12 (depends on 10) The device of claim 10, wherein the value includes a bit mask. ### Claim 13 (depends on 1) The device of claim 1, wherein the plurality of configuration registers is programmable by software. ### Claim 14 (depends on 1) The device of claim 1, wherein the time interval is programmable by software. ### Claim 15 A hardware support method for software controlled reconfiguration of performance counters, comprising: selecting a configuration register using a first multiplexer among a plurality of configuration registers specifying which hardware related activities to count; a timer processing element obtaining a time interval value; and in response to detecting expiration of the time interval value, a state machine switching to the selected configuration register to reconfigure the selected activity tracked by a performance counter. ### Claim 16 (depends on 15) The method of claim 15, wherein the time interval value is programmed by software. ### Claim 17 (depends on 15) The method of claim 15, wherein the plurality of configuration registers is programmed by software. ### Claim 18 A non-transitory computer readable storage medium storing a program of instructions executable by a machine to perform a hardware support method for software controlled reconfiguration of performance counters, comprising: selecting a configuration register among a plurality of configuration registers specifying which hardware related activities to count; identifying an on or off bit indicating whether to perform reconfiguring of the performance counter; a timer processing element obtaining a time interval value; and in response to detecting expiration of the time interval value and based on the on or off bit, a state machine switching to the selected configuration register to reconfigure the selected activity tracked by a performance counter. ### Claim 19 (depends on 18) The computer readable storage medium of claim 18, further including setting the time interval value. ### Claim 20 (depends on 18) The computer readable storage medium of claim 18, further including writing to the plurality of configuration registers for setting a plurality of configurations specifying selected performance counters for collecting counts of selected activities. ### Claim 21 A device for providing hardware support for reconfiguring performance counters in a computer system, comprising: a plurality of performance counters operable to collect one or more counts of one or more selected activities; a storage element storing an on or off bit indicating whether to perform reconfiguring of a performance counter of the plurality of performance counters; a plurality of configuration registers operable to store a set of performance counter configurations; and a state machine operable to select a configuration register from the plurality of configuration registers for reconfiguring the one or more performance counters based on the on or off bit.