# US 8,543,077 B2 · Method and apparatus for controlling a harmonic rejection mixer

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- Number: US 8,543,077 B2
- Document ID: US8543077B2
- Status: Granted
- Kind: B2
- Application number: 12/947,285
- Filed: 2010-11-16
- Published: 2011-03-17
- Granted: 2013-09-24
- Earliest claimed: 2007-06-29
- Assignees: Silicon Laboratories Inc.
- Applicants: Aslamali A. Rafi; Alessandro Piovaccari
- Inventors: Aslamali A. Rafi; Alessandro Piovaccari
- Web page: https://patentgrep.com/patent/US8543077B2

## CPC

- H04B 1/16: Circuits
- H03D 7/1441: {using field-effect transistors (H03D7/145 takes precedence)}
- H03D 7/1458: {Double balanced arrangements, i.e. where both input signals are differential}
- H03D 7/1483: {comprising components for selecting a particular frequency component of the output}
- H04N 5/455: Demodulation-circuits
- H03D 2200/0025: Gain control circuits
- H03D 2200/0084: Lowering the supply voltage and saving power
- H03D 2200/0086: Reduction or prevention of harmonic frequencies
- H04B: TRANSMISSION
- H03D: DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER (masers, lasers H01S; circuits capable of acting both as modulator and demodulator H03C; details applicable to both modulators and frequency-changers H03C; demodulating pulses H03K9/00; transforming types of pulse modulation H03K11/00; coding, decoding or code conversion, in general H03M; repeater stations H04B7/14; demodulators adapted for AC systems of digital information transmission H04L27/00; synchronous demodulators adapted for colour television H04N9/66)
- H04N: PICTORIAL COMMUNICATION, e.g. TELEVISION

## Abstract

In one embodiment, the present invention includes a method for receiving a radio frequency (RF) signal and mixing the RF signal with a master clock to obtain a mixed signal, cyclically rotating the mixed signal to each of N gain stages for at least one cycle of the master clock, and summing the outputs of the N gain stages to provide an output signal.

## Claims

### Claim 1

A method comprising:
receiving an incoming radio frequency (RF) signal and mixing the incoming RF signal with a master clock, the master clock corresponding to a multiplied version of a local oscillator (LO) frequency, to obtain a mixed signal;
cyclically rotating the mixed signal to each of a plurality of N gain stages for at least one cycle of the master clock during a cycle of the LO; and
summing the outputs of the plurality of N gain stages to provide an output signal.

### Claim 2 (depends on 1)

The method of claim 1, further comprising cyclically rotating the mixed signal from a first one to a second one of the plurality of N gain stages when the master clock is at a low value.

### Claim 3 (depends on 1)

The method of claim 1, wherein the plurality of N gain stages each comprises an impedance corresponding to a weighted value obtained from a unitary impedance value and a predetermined weighted value.

### Claim 4 (depends on 3)

The method of claim 3, wherein the plurality of N gain stages further comprises a unity gain buffer having an output coupled to the impedance.

### Claim 5 (depends on 1)

The method of claim 1, further comprising cyclically rotating the mixed signal such that each of the plurality of N gain stages is to receive the mixed signal for a predetermined portion of the LO cycle.

### Claim 6 (depends on 5)

The method of claim 5, further comprising cyclically rotating the mixed signal to less than all of the plurality of N gain stages, based at least in part on a frequency of the incoming RF signal.

### Claim 7 (depends on 6)

The method of claim 6, further comprising reducing or preventing harmonic rejection by matching passive components in the plurality of N gain stages, wherein an RF mixer that mixes the incoming RF signal includes a single differential transconductor.

### Claim 8 (depends on 1)

The method of claim 1, further comprising cyclically rotating positive and negative portions of the mixed signal in a complementary fashion to each of first and second sets of the plurality of N gain stages.

### Claim 9 (depends on 8)

The method of claim 8, wherein each of the plurality of N gain stages includes a gain buffer having an output coupled to an impedance having a first weighted value or a second weighted value.

### Claim 10 (depends on 9)

The method of claim 9, wherein the first weighted value corresponds to a ratio of a unitary impedance value and a predetermined value, wherein the predetermined value equals
sin
⁡
(
2
⁢
π
N
⁢
k
)
,
where k is 0 to N−1, and the second weighted value corresponds to a ratio of the unitary impedance value and a second predetermined value, wherein the second predetermined value equals
cos
⁡
(
2
⁢
π
N
⁢
k
)
.

### Claim 11

An apparatus comprising:
a low noise amplifier (LNA) to receive an incoming radio frequency (RF) signal;
a mixer to mix the incoming RF signal with a master clock to obtain a mixed signal, the master clock corresponding to a multiplied version of a local oscillator (LO) frequency;
a plurality of N gain stages each to receive a cyclical rotation of the mixed signal for at least one cycle of the master clock during a cycle of the LO; and
a summer to sum the outputs of the plurality of N gain stages to provide an output signal.

### Claim 12 (depends on 11)

The apparatus of claim 11, further comprising a switch to cyclically rotate the mixed signal from a first one to a second one of the plurality of N gain stages when the master clock is at a low value.

### Claim 13 (depends on 11)

The apparatus of claim 11, wherein the plurality of N gain stages each comprises an impedance corresponding to a weighted value obtained from a unitary impedance value and a predetermined weighted value.

### Claim 14

A method comprising:
receiving an incoming radio frequency (RF) signal in a single differential transconductor of a mixer and mixing the incoming RF signal with a master clock in master local oscillator (LO) devices of the mixer, the master clock corresponding to a multiplied version of a LO frequency, to obtain a mixed signal;
cyclically rotating the mixed signal to each of a plurality of N gain stages via N rotational switches for at least one cycle of the master clock during a cycle of the LO; and
summing the outputs of the plurality of N gain stages to provide an output signal.

### Claim 15 (depends on 14)

The method of claim 14, further comprising cyclically rotating the mixed signal from a first one to a second one of the plurality of N gain stages when the master clock is at a low value.

### Claim 16 (depends on 14)

The method of claim 14, wherein the plurality of N gain stages each comprises an impedance corresponding to a weighted value obtained from a unitary impedance value and a predetermined weighted value.

### Claim 17 (depends on 16)

The method of claim 16, wherein the plurality of N gain stages further comprises a unity gain buffer having an output coupled to the impedance.

### Claim 18 (depends on 14)

The method of claim 14, further comprising cyclically rotating the mixed signal such that each of the plurality of N gain stages is to receive the mixed signal for a predetermined portion of the LO cycle.

### Claim 19 (depends on 18)

The method of claim 18, further comprising cyclically rotating the mixed signal to less than all of the plurality of N gain stages, based at least in part on a frequency of the incoming RF signal.